category: NoC NoC

category: Auto, Security & Edge AI

Using SystemC TLM Modeling To Solve AI Data Movement Challenges
By Andy Nightingale - 28 May, 2026 - Comments: 0

In AI silicon, the performance numbers tell only part of the story. Marketing claims often highlight headline metrics such as trillions of operations per second, tensor throughput, matrix dimensions, and accelerator density. But engineers building these systems understand the harder truth. Compute performance matters only when data arrives at the right rate, with the right latency, and without ... » read more

Facilitating Complex SoC Design Through Automation And Integration
By Andy Nightingale - 30 Apr, 2026 - Comments: 0

The design demands of today’s highly advanced system-on-chip (SoC) devices have long outgrown the capabilities of manual workflows to manage them effectively. As these chips become more complex, only sophisticated, high-performance, and scalable automation can ensure that every component of the SoC functions seamlessly. The SoC integration challenge A fundamental aspect of SoC design is the... » read more

Importance Of Hardware Security Verification In Pre-Silicon Design
By John Elliott - 26 Mar, 2026 - Comments: 0

Today’s semiconductor chips run cloud infrastructure, automotive controllers, industrial robots, and edge AI processors, so effectively the entire technology market. Engineers must now ensure that silicon itself defends against attacks, protects embedded secrets, and complies with increasingly stringent global security standards, such as ISO/SAE 21434 and the EU Cyber Resilience Act. Regulato... » read more

AI Energy Gap And Chiplets: Why Data Movement Matters
By Ashley Stevens - 26 Feb, 2026 - Comments: 0

At the recent Chiplet Summit 2026 preconference tutorial, the panel session, “Best Way to Make Chiplets Work,” brought together leaders from across the semiconductor ecosystem to tackle one of the most pressing challenges in advanced system design: how do we make heterogeneous, multi-die systems operate as a cohesive, energy-efficient whole for AI? While much discussion focused on st... » read more

Solving Real-World AI Bottlenecks
By André Bonnardot - 02 Feb, 2026 - Comments: 0

The race to build smarter and faster AI chips continues to surge. This is especially true in autonomous vehicles that interpret the world in milliseconds, edge accelerators that push trillions of operations per second, hyperscale data-center processors that drive massive workloads, and next-generation consumer devices that demand ever-higher intelligence. As modern system-on-chip (SoC) architec... » read more

A Golden Source As The Single Source Of Truth In HSI
By Tim Schneider - 25 Nov, 2025 - Comments: 0

The hardware/software interface (HSI) is where system-on-chip (SoC) software defines the connections between the software and the underlying hardware. Maintaining a precise, synchronized HSI across all artifacts is challenging, and unmanaged deviations can propagate through the flow and affect integration schedules. Most complex SoCs rely on IP reuse, each with its own naming conventions, ha... » read more

Efficiency Defines The Future Of Data Movement
By Andy Nightingale - 30 Oct, 2025 - Comments: 0

For decades, chip performance was measured by how much raw compute could be packed onto a die. However, that equation has changed. Moving data across a system-on-chip (SoC) now consumes more energy than the computations it performs. Efficient data movement has become a significant challenge for next-generation SoC designs. AI workloads are multiplying, hyperscale data centers are approaching po... » read more

The Future Of SoC Design Is Data Movement
By Andy Nightingale - 25 Sep, 2025 - Comments: 0

The semiconductor industry is experiencing rapid advances in chiplet adoption, high-bandwidth memory, Compute Express Link (CXL) fabrics, and automotive zonal architectures. As we move into the second half of 2025, the only sustainable path forward is a layered, physically aware, and automated interconnect methodology that can keep pace with escalating complexity. This article is Part Two of... » read more

A Smarter Path To Chiplets Through An Enhanced Multi-Die Solution
By Andy Nightingale - 28 Aug, 2025 - Comments: 0

The rise of artificial intelligence (AI) is advancing at breakneck speed, pushing computing demands. At the same time, Moore’s Law slows, making monolithic devices increasingly cost-prohibitive and harder to scale. As traditional monolithic scaling hits the wall, the solution is to disaggregate the design into multiple dies, known as chiplets. These chiplets are mounted on a common substrate ... » read more

System Integration With Standards-Based Automation
By Insaf Meliane - 31 Jul, 2025 - Comments: 0

Today’s semiconductor designs support a broad range of applications, from mobile and edge devices to AI accelerators and data center systems. To keep pace, design teams are shifting from monolithic systems-on-chip (SoCs) to increasingly complex multi-die and chiplet-based architectures. These heterogeneous systems often incorporate IP developed at different times, by different teams, or sourc... » read more

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