Optimizing Interconnect Topologies For Automotive ADAS Applications


Designing automotive Advanced Driver Assistance Systems (ADAS) applications can be incredibly complex. State-of-the-art ADAS and autonomous driving systems use ‘sensor fusion’ to combine inputs from multiple sources, typically cameras and optionally radar and lidar units to go beyond passive and active safety to automate driving. Vision processing systems combine specialized AI accelerators... » read more

Streamlining SoC Design With Advanced IP And Integration Solutions


As system-on-chip (SoC) complexity grows, so does the necessity for products that seamlessly connect IP and streamline integration processes, minimize manual errors, and enhance productivity. The emphasis on physical awareness across solutions significantly reduces the iterative cycles of NoC placement and routing. By ensuring low latency and high efficiency, these advanced integration solution... » read more

Turbocharging Cost-Conscious SoCs With Cache


Some design teams creating system-on-chip (SoC) devices are fortunate to work with the latest and greatest technology nodes coupled with a largely unconstrained budget for acquiring intellectual property (IP) blocks from trusted third-party vendors. However, many engineers are not so privileged. For every “spare no expense” project, there are a thousand “do the best you can with a limited... » read more

The Path Toward Future Automotive EE Architectures


From a semiconductor market perspective, all eyes are on the automotive domain. According to Gartner, as of 2023, the automotive market is now its second-largest segment, with about 14% of the demand. Only smartphones consume more. As I mused last month in "Automotive Semiconductor March Madness 2024," those who made a bet on automotive a decade or longer ago are pretty happy these days. Still,... » read more

Automotive Semiconductor March Madness 2024


As the US is amid "Basketball March Madness" – hard to ignore when you live in Silicon Valley – it also felt like the month of "Automotive Madness." We saw numerous announcements and events across the design chain, from semiconductor IP to software and IP providers to automotive OEMs. And in all of them, data-transport architectures, and with that networks-on-chips (NoCs), are critical. Ma... » read more

NoC Development – Make Or Buy?


In the selection and qualification process for semiconductor IP, design teams often consider the cost of in-house development. Network-on-Chip (NoC) IP is no different. In “When Does My SoC Design Need A NoC?” Michael Frank and I argued that most of today’s designs – even less complex ones – can benefit from NoCs. In the blog “Balancing Memory And Coherence: Navigating Modern Chip A... » read more

Will 2024 Be The Year Of Layered Realities?


January is always the month of predictions. Our team has already contributed to Semiconductor Engineering's 2023 Look Back and 2024 Outlook. My personal tradition has become to combine the outlook with a look back at what industry experts thought of a decade ago. While this involved a trip to my garage to pick up the respective January IEEE Spectrum issue a decade ago, the new reality is that a... » read more

Balancing Memory And Coherence: Navigating Modern Chip Architectures


In the intricate world of modern chip architectures, the "memory wall" – the limitations posed by external DRAM accesses on performance and power consumption growing slower than the ability to compute data – has emerged as a pivotal challenge. Architects must strike a delicate balance between leveraging local data reuse and managing external memory accesses. While caches are critical for op... » read more

SoC Integration And Data Transport Architecture Requirements Surge In 2023


As the holiday season is in full swing, it's retrospection and prediction time! Let's look at what I thought 2023 would look like, review how it turned out, and take a first stab at 2024 predictions. As a spoiler, my biggest surprise was the intensity with which artificial intelligence and machine learning (AI/ML) accelerated since Generative AI was put on the mainstream adoption map last year,... » read more

System-on-Chip Integration Complexity And Hardware/Software Contracts


From the earliest days of my career, when designing chips, I have always navigated the interface between hardware and software for semiconductor design in my roles. My initial chip designs included video and audio encoding and decoding, supporting standards like MPEG and H.261. As acceleration parts of hardware/software systems, these had many Control and Status Registers (CSRs) to program. The... » read more

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