Frank Schirrmeister

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Frank Schirrmeister is executive director, strategic programs, system solutions in Synopsys' System Design Group. He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like AI/ML. Prior to Synopsys, Schirrmeister held various senior leadership positions at Arteris, Cadence Design Systems, Imperas, Chipvision and SICAN Microelectronics, focusing on product marketing and management, solutions, strategic ecosystem partner initiatives, and customer engagement. He holds an MSEE from the Technical University of Berlin and actively participates in cross-industry initiatives as chair of the Design Automation Conference's Engineering Tracks.

Author's Latest Posts

How Far Left Can We Really Shift Verification?
By Frank Schirrmeister - 25 Jun, 2026 - Comments: 0

"Shift left" has been in the engineering lexicon for so long that it risks becoming wallpaper. We nod at it, we put it on slides, and we move on. But the goalposts keep moving. Things that used to live comfortably at the tail end of the design flow — software bring-up, power and performance characterization, thermal analysis — are being dragged earlier and earlier into the schedule, driven ... » read more

Software-Defined Hardware-Assisted Verification: Scaling To Quadrillions Of Cycles For Verification In The AI Era
By Frank Schirrmeister - 23 Dec, 2025 - Comments: 0

The semiconductor industry is at an inflection point. The convergence of advanced multi-die architectures, AI-driven workloads, and rapidly evolving interface protocols is creating unprecedented design complexity. At the same time, market pressures demand faster time-to-market and higher performance, leaving little room for error. From data center to edge developments, users have to run softwar... » read more

The Path Toward Future Automotive EE Architectures
By Frank Schirrmeister - 25 Apr, 2024 - Comments: 0

From a semiconductor market perspective, all eyes are on the automotive domain. According to Gartner, as of 2023, the automotive market is now its second-largest segment, with about 14% of the demand. Only smartphones consume more. As I mused last month in "Automotive Semiconductor March Madness 2024," those who made a bet on automotive a decade or longer ago are pretty happy these days. Still,... » read more

Automotive Semiconductor March Madness 2024
By Frank Schirrmeister - 28 Mar, 2024 - Comments: 0

As the US is amid "Basketball March Madness" – hard to ignore when you live in Silicon Valley – it also felt like the month of "Automotive Madness." We saw numerous announcements and events across the design chain, from semiconductor IP to software and IP providers to automotive OEMs. And in all of them, data-transport architectures, and with that networks-on-chips (NoCs), are critical. Ma... » read more

NoC Development – Make Or Buy?
By Frank Schirrmeister - 29 Feb, 2024 - Comments: 0

In the selection and qualification process for semiconductor IP, design teams often consider the cost of in-house development. Network-on-Chip (NoC) IP is no different. In “When Does My SoC Design Need A NoC?” Michael Frank and I argued that most of today’s designs – even less complex ones – can benefit from NoCs. In the blog “Balancing Memory And Coherence: Navigating Modern Chip A... » read more

Will 2024 Be The Year Of Layered Realities?
By Frank Schirrmeister - 25 Jan, 2024 - Comments: 0

January is always the month of predictions. Our team has already contributed to Semiconductor Engineering's 2023 Look Back and 2024 Outlook. My personal tradition has become to combine the outlook with a look back at what industry experts thought of a decade ago. While this involved a trip to my garage to pick up the respective January IEEE Spectrum issue a decade ago, the new reality is that a... » read more

Balancing Memory And Coherence: Navigating Modern Chip Architectures
By Frank Schirrmeister - 21 Dec, 2023 - Comments: 0

In the intricate world of modern chip architectures, the "memory wall" – the limitations posed by external DRAM accesses on performance and power consumption growing slower than the ability to compute data – has emerged as a pivotal challenge. Architects must strike a delicate balance between leveraging local data reuse and managing external memory accesses. While caches are critical for op... » read more

SoC Integration And Data Transport Architecture Requirements Surge In 2023
By Frank Schirrmeister - 30 Nov, 2023 - Comments: 0

As the holiday season is in full swing, it's retrospection and prediction time! Let's look at what I thought 2023 would look like, review how it turned out, and take a first stab at 2024 predictions. As a spoiler, my biggest surprise was the intensity with which artificial intelligence and machine learning (AI/ML) accelerated since Generative AI was put on the mainstream adoption map last year,... » read more

System-on-Chip Integration Complexity And Hardware/Software Contracts
By Frank Schirrmeister - 26 Oct, 2023 - Comments: 0

From the earliest days of my career, when designing chips, I have always navigated the interface between hardware and software for semiconductor design in my roles. My initial chip designs included video and audio encoding and decoding, supporting standards like MPEG and H.261. As acceleration parts of hardware/software systems, these had many Control and Status Registers (CSRs) to program. The... » read more

Network-on-Chips Enabling Artificial Intelligence/Machine Learning Everywhere
By Frank Schirrmeister - 28 Sep, 2023 - Comments: 0

Recently, I attended the AI HW Summit in Santa Clara and Autosens in Brussels. Artificial intelligence and machine learning (AI/ML) were critical themes for both events, albeit from different angles. While AI/ML as a buzzword is very popular these days in all its good and bad ways, in discussions with customers and prospects, it became clear that we need to be precise in defining what type of A... » read more

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