Some Chipmakers Sidestep Scaling, Others Hedge


The rising cost of developing chips at 7nm coupled with the reduced benefits of scaling have pried open the floodgates for a variety of options involving new materials, architectures and packaging that either were ignored or not fully developed in the past. Some of these approaches are closely tied to new markets, such as assisted and autonomous vehicles, robotics and 5G. Others involve new ... » read more

EUV Mask Blank Battle Brewing


Amid the ramp of extreme ultraviolet (EUV) lithography in the market, suppliers of EUV mask blanks are expanding their production. And a new player—Applied Materials—is looking to enter the market. AGC and Hoya, the two main suppliers of EUV mask blanks, are adding capacity for these critical components that are used for EUV photomasks. A mask blank serves as the substrate for a photomas... » read more

Multi-Beam Mask Writing Finally Comes Of Age


Elmar Platzgummer, chief executive of IMS Nanofabrication, sat down with Semiconductor Engineering to discuss photomask and mask writing trends. IMS, a subsidiary of Intel, is a supplier of multi-beam e-beam systems for photomask production. What follows are excerpts of that conversation. SE: For years, photomask makers have used single-beam e-beam tools to pattern or write the features on ... » read more

How To Improve Analog Design Reuse


Digital circuit design is largely automated today, but most analog components still are designed manually. This may change soon. As analog design grows increasingly complex and error-prone, design teams and tool vendors are focusing on how to automate as much of the design of analog circuits as possible. Analog design is notoriously difficult and varied. It can include anything from power ma... » read more

Machine Learning Moves Into Fab And Mask Shop


Semiconductor Engineering sat down to discuss artificial intelligence (AI), machine learning, and chip and photomask manufacturing technologies with Aki Fujimura, chief executive of D2S; Jerry Chen, business and ecosystem development manager at Nvidia; Noriaki Nakayamada, senior technologist at NuFlare; and Mikael Wahlsten, director and product area manager at Mycronic. What follows are excerpt... » read more

Design For Advanced Packaging


Advanced packaging techniques are viewed as either a replacement for Moore's Law scaling, or a way of augmenting it. But there is a big gap between the extensive work done to prove these devices can be manufactured with sufficient yield and the amount of attention being paid to the demands advanced packaging has on the design and verification flows. Not all advanced packaging places the same... » read more

Taming NBTI To Improve Device Reliability


Negative-bias temperature instability is a growing issue at the most advanced process nodes, but it also has proven extremely difficult to tame using conventional approaches. That finally may be starting to change. NBTI is an aging mechanism in field-effect transistors that leads to a change of the characteristic curves of a transistor during operation. The result can be a drift toward unint... » read more

Computing Way Outside Of A Box


Mike Muller, CTO of Arm, sat down with Semiconductor Engineering to talk about changing boundaries between client and server machines, the end of Moore's Law and the impact of machine learning on chip architectures. What follows are excerpts of that conversation. SE: Are the lines blurring between what's considered a client device and what's considered a server? Muller: It's less about a ... » read more

Are Devices Getting More Secure?


Adding security into chip design is becoming more prevalent as more devices are connected to the Internet, but it's not clear whether that is enough to offset an explosion in connected "things." Security concerns have been growing for the past half-decade, starting with a rash of high-profile attacks on retail establishments, hotel membership clubs, and Equifax, one of the three top credit-c... » read more

Panel Fan-out Ramps, Challenges Remain


After years of R&D, panel-level fan-out packaging is finally beginning to ramp up in the market, at least in limited volumes for a few vendors. However, panel-level fan-out, which is an advanced form of today’s fan-out packaging, still faces several technical and cost challenges to bring this technology into the mainstream or high-volume manufacturing. Moreover, several companies are d... » read more

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