category: Top Stories

category: Auto, Security & Edge AI

Inspection And Metrology Catching Up For High-Density Fan-Out Panel Packaging
By Anne Meixner - 07 Jul, 2026 - Comments: 0

Key Takeaways:  To support AI/HPC devices, high-density fan-out on panels must deliver increased RDL layer count and micropillar height while decreasing the trace and bump/micropillar pitch.   Metrology and inspection steps assist with achieving known-good panel requirements to avoid throwing away expensive chiplets, such as HBM and TPUs.  Optical measurement systems need to acco... » read more

AI Data Centers And Auto Industry Converge On Same Issues
By Liz Allan - 02 Jul, 2026 - Comments: 0

Key Takeaways:   AI data centers need power from a range of sources, including batteries, to safeguard against blackouts, transient voltage spikes, and grid demand spikes.  As with regenerative braking and bidirectional charging in electric vehicles, data centers could feed power or heat back into the grid for public use, but the immediate goal is to disrupt the grid as little as pos... » read more

Defending Against AI-Enabled Data Fusion
By Ann Mutschler - 02 Jul, 2026 - Comments: 0

Key Takeaways:  By fusing vast amounts of white-, gray-, and black-market data, attackers can build a digital twin of a person and their environment, making targeted attacks far easier.  The intersection of AI and cybersecurity is the data itself. Trustworthy fusion depends on authenticated, integrity‑checked inputs and verifiable, attributable AI outputs.   Defending a... » read more

Fine-Tuning Humanoid Vision And Movement
By Liz Allan - 02 Jul, 2026 - Comments: 0

Key Takeaways: Humanoids and autonomous vehicles share a zonal architecture, a need for FuSa, and a reliance on radar technology to see around corners and through objects. Multiple cameras with different fidelities can better replicate a human’s field of view; for example, some can provide wide fields of view at low grade, low fidelity, while others strive for infinite fidelity in a... » read more

Observability Is A Missing Layer In AI-Era Chiplet Design
By Ann Mutschler - 01 Jul, 2026 - Comments: 0

Key Takeaways: In chiplet-based architectures, observability must be designed as a fabric-aligned, cross-die telemetry plane so architects can correlate traffic, latency, congestion, and fault behavior across package boundaries without losing system context. AI can extract value from high-volume silicon telemetry only when the architecture provides consistent instrumentation, near-senso... » read more

I/O Design Challenges Grow In AI Data Centers And HPC Clusters
By Liz Allan - 25 Jun, 2026 - Comments: 0

Key Takeaways: A designer’s choice of I/O connectors and interconnect protocols can be the difference between a massively profitable AI chip and a flop. I/O tradeoffs impact airflow, cooling, rack design, power coming into the rack, and other critical aspects of HPC chip design. Reliability is paramount, so standards must be followed, and I/Os need redundant pins. Other innovations... » read more

Verification Methodologies Struggle To Keep Up With AI
By Brian Bailey - 25 Jun, 2026 - Comments: 0

Key Takeaways:  The rapid development of AI has resulted in new capabilities being provided to verification teams, beyond their ability to rationally insert them into accepted methodologies.  There is a lot of uncertainty about who will benefit the most from this technology. Is AI a junior engineer replacement or an enhancer?  The biggest benefits will come when AI helps engineers... » read more

Executive Outlook: Agentic AI’s Impact On Chip Design
By Ed Sperling - 25 Jun, 2026 - Comments: 1

Key Takeaways: Agentic AI has the potential to make engineers more productive, speed time to market, and automate some of the drudge work. The big challenge for design and verification engineers is where and whether they trust AI to get everything right, because there is no margin for error in semiconductors. Having humans in the loop will likely be the rule rather than the exception... » read more

Mask Economics Shape High-NA EUV Adoption
By Gregory Haley - 22 Jun, 2026 - Comments: 1

Key Takeaways: Mask costs are not stopping leading-edge scaling, but they increasingly influence design, node, and process choices. High-NA EUV will tighten requirements for CD, EPE, local CDU, mask 3D modeling, stitching, and materials. Reduced depth of focus in High-NA EUV will drive new resist, etch, film, and absorber approaches. Experts at the table: Semiconductor Engin... » read more

How To Build Billions of Bumps
By Bryon Moyer - 18 Jun, 2026 - Comments: 0

Key Takeaways: Hybrid bonding can result in a package containing billions (and eventually trillions) of connections. Building that many connections successfully requires extreme process uniformity across a wafer. Inspection isn’t practical, and test benefits from internal test mechanisms. Hybrid bonding allows unprecedented signal pitch, but fully populating dies and inter... » read more

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