Automated 310mm Panel-Level Packaging to Accelerate AI Innovation: Tech Brief


This shift to panel-level packaging addresses critical industry challenges, including rising interposer sizes and declining wafer-level efficiency. The larger panel format supports higher throughput, reduced cycle time, and lower cost per package, while enabling integration of increasingly complex multi-die architectures. These benefits are especially impactful for AI data center and HPC applic... » read more

Cost-Effective High-Performance Flip Chip MicroLeadFrame (fcMLF) Package Introduction


Abstract "The demand for cost-effective leadframe packages continues to grow, particularly for automotive and commercial applications. These designs require smaller form factors, enhanced thermal and electrical performance, and proven reliability. Flip chip on leadframe technology offers significant advantages over traditional wire-bonded MicroLeadFrame (MLF) and high-cost laminate Flip Chip... » read more

Energy-Efficient Liquid Cooling for Advanced Semiconductor Packaging (KAIST)


A new technical paper, "Highly energy-efficient manifold microchannel for cooling electronics with a coefficient of performance over 100,000," was published by researchers at KAIST. The study presents a CMOS-compatible manifold microchannel cooler that removes over 2,000 W/cm² using single-phase water at only 8 kPa pressure drop, achieving a record COP of 106,000—a significant improvement... » read more

Alumina Nanowires Improve Thermal Management in Advanced Packaging (Georgia Tech et al.)


A new technical paper, "Epoxy Composites Reinforced with Long Al2O3 Nanowires for Enhanced Thermal Management in Advanced Semiconductor Packaging," was published by researchers at the Georgia Institute of Technology and National Cheng Kung University. Abstract "The rapid increase in heat flux in advanced 2.5D/3D semiconductor packaging places stringent demands on thermal interface materia... » read more

Panel-Level Packaging’s Second Wave Meets Engineering Reality


Key Takeaways Panel-level packaging is arriving not because the engineering is ready, but because wafer-level economics are breaking down. Glass improves the warpage and dimensional stability problems of organic substrates but introduces a different class of failure modes that require materials solutions, not process adjustments. The central challenges of panel-level processing are m... » read more

Advanced Packaging Limits Come Into Focus


Key Takeaways: Packaging is now a performance variable. Substrate, bonding, and process sequence determine what can be built at scale. Warpage underlies most advanced packaging failures and gets harder to control as package sizes grow. Every proposed solution, such as glass, panel processing, and backside power, solves one problem while creating another. Moore's Law has shif... » read more

AFM-Based Protocol for Characterizing the Incipient Stages of Plasticity on Hybrid Bonding-Ready Copper Pads (NIST, Intel, Colorado School of Mines)


A new technical paper titled "Probing the Nanoscale Onset of Plasticity in Electroplated Copper for Hybrid Bonding Structures via Multimodal Atomic Force Microscopy" was published by researchers at the National Institute of Standards and Technology, Intel, and Colorado School of Mines. Excerpt  "The slowdown of Moore’s law has elicited a paradigm shift whereby shrinking of in-plane dim... » read more

Advanced Packaging: IPL Reflow Technology For Thermal Regulation (Sungkyunkwan Univ.)


A new technical paper titled "A color-coded light-induced heating technology for Pb-free solder joints of advanced multi-semiconductor packaging" was published by researchers at Sungkyunkwan University. Excerpt from paper: "This study introduces a color-coded intense pulsed light (IPL) reflow process, leveraging differential light absorption for localized thermal modulation, enabling simu... » read more

Gallium-Based SMP for High-Performance Cu-to-Cu Bonding (National Cheng Kung Univ.)


A new technical paper titled "Sonochemical Synthesis of Submicrometer Ga-Based Particles for Cu-to-Cu Interconnection" was published by researchers at National Cheng Kung University. Abstract "Heterogeneous integration has been the most important electronic packaging technology, with the emerging needs of miniaturization of electronic devices. Conventional solders are gradually unable to me... » read more

3DICs: Atomic-Scale Behavior of Electromigration in Cu−Cu Joints (NYCU, ITRI)


A new technical paper titled "In Situ Atomic-Scale Investigation of Electromigration Behavior in Cu–Cu Joints at High Current Density" was published by researchers at National Yang Ming Chiao Tung University (NYCU) and the Industrial Technology Research Institute (ITRI). Excerpt "Electromigration (EM) poses significant challenges to the reliability of miniaturized devices, particularly th... » read more

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