Technical Paper Home

Packaging

• Advanced Packaging: IPL Reflow Technology For Thermal Regulation (Sungkyunkwan Univ.)

  Published on December 5, 2025

• Simplifying ESD Protection and Inter-Chiplet Signaling In Future 2.5D/3D Packaging Technologies (Arizona State, Univ. of Minnesota)

  Published on November 25, 2025

• Roadmap for Open-Source Chiplet-Based RISC-V Systems For HPC and AI (ETH Zurich, Univ. of Bologna)

  Published on November 25, 2025

• Advantages Of IPL Soldering Over Reflow Soldering For Cu Pillar Bump Interconnections On Glass Substrates (Chungbuk, Sungkyunkwan Univ.)

  Published on November 21, 2025

• Silicon Photonic Interconnected Chiplets With Computational Network And IMC For LLM Inference Acceleration (NUS)

  Published on November 10, 2025

• Co-Simulation Framework for Parallel DNN Execution on Chiplet-Based Systems (UW–Madison, Washington State)

  Published on November 3, 2025

• Utilizing Chiplet-Locality For Efficient Memory Mapping In MCM GPUs (ETRI, Sungkyunkwan Univ.)

  Published on October 30, 2025

• Thermal Simulation And Optimization in 3D-IC Design (Intel, UCSB, Cadence)

  Published on October 22, 2025

• 3D Stacked HBM and Accelerators for LLMs: Heat Management and PDN (Georgia Tech, SK Hynix)

  Published on October 17, 2025

• Gallium-Based SMP for High-Performance Cu-to-Cu Bonding (National Cheng Kung Univ.)

  Published on October 16, 2025
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