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Harnessing The Power Of Data In Semiconductor Test


Every day, new methods are being developed to harvest, cleanse, integrate, and analyze data sources and extract from them useful, actionable intelligence to aid decision-making and other processes. This is true for a variety of industries, including semiconductor design, manufacturing, and test. Moore’s Law (figure 1) may be slowing with respect to traditional scaling of transistor critica... » read more

HSIO Loopback Turns Challenges Into Opportunities For Test At 112 Gbps


By Dave Armstrong and Don Thompson For both PCIe and Ethernet (IEEE 802.3,) signals are getting mighty small. With PCIe 5 reaching 32 Gbps (NRZ at 32 GBaud) and 802.3 reaching 112 Gbps (PAM4 at 56 GBaud), typical eye-mask limits are shrinking. Consequently, test requirements for high-speed I/O (HSIO) test are becoming daunting. HSIO test involves measurement of Tx eye height and width, co... » read more

Automotive Keyless Entry SoC Test Methodologies And Techniques


By Philip Brock, Louis Benton, Jr., and Jonvyn Wongso Passive Entry Passive Start (PEPS) technology has become standard in the automotive market for keyless operation. A secure wireless communication system, PEPS enables you to lock and unlock the vehicle, and start and stop the vehicle without physically using the key. Electronic functionality embedded in the key fob to interact with the ve... » read more

SLT Enables Test Content To Shift Right


By Dave Armstrong, Davette Berry, and Craig Snyder Increasing device complexity and the continuing drive for higher levels of quality are fostering a reconsideration of test strategies. To be effective, test engineers must choose how to optimally deploy test content, from wafer probing to system-level test (SLT). A March 2019 TestConX presentation1 outlines how test content is typically allo... » read more

Driving Toward Predictive Analytics With Dynamic Parametric Test


The foundation of parametric test within semiconductor manufacturing is its usefulness in determining that wafers have been fabricated properly. Foundries use parametric test results to help verify that wafers can be delivered to a customer. For IDMs, the test determines whether the wafers can be sent on for sorting. Usually inserted into the semiconductor manufacturing flow during wafer fabric... » read more

Hybrid System-Level Test For RF SiP


In recent years, the proliferation of the IoT has focused attention on low-power-wireless applications. IoT modules incorporating functions such as Bluetooth Low Energy (BLE) transceivers, MCUs, and power-management circuitry are becoming system-in-package (SiP) and even one-chip devices. Such devices increase the demand for a mass-production test environment that can measure them in a short ti... » read more

Testing AiP Modules In High-Volume Production


Far-field and radiating near-field are two options for high-volume over-the-air (OTA) testing of antenna-in-package (AiP) modules with automated test equipment (ATE) [1]. In this article, we define an AiP device under test (DUT) and examine the measurement results from both methods. Creating an AiP evaluation vehicle Proper evaluation of an ATE OTA measurement setup requires an AiP module. Us... » read more

ATE In The Age Of Convergence And Exascale Computing


We are currently in the midst of the age of convergence – that is, the convergence of data from a range of applications and data sources. These sources constitute anything that creates data – ranging from human-created data, such as voice and video, through automotive, mobile, and wireless/IoT devices. This also includes edge computing and servers storing the massive amounts of data needed ... » read more

Parallel RF Test For Next-Generation Communications


The test economics of state-of-the-art smartphones, tablets and routers demand highly parallel RF test. We are addressing this next wave in RF communications test, enabled by Wi-Fi 6E, operating in the 6GHz band and coming up to 7.125GHz. This forthcoming update to the Wi-Fi standard will extend the features and capabilities, including higher performance, lower latency, and faster data rates fo... » read more

System-Level Test Methodologies Take Center Stage


Because electronic systems for all applications in end-user markets must provide the highest possible reliability to match customers’ quality expectations, semiconductor components undergo multiple tests and stress steps to screen out defects that could arise during their lifecycle. Due to new semiconductor devices’ increasing design complexity and extreme process technology, increased test... » read more

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