category: Silicon Lifecycle Management

category: IoT, Security & Automotive

Silicon Lifecycle Management Advances With Unified Analytics
By Guy Cortez - 25 Apr, 2023 - Comments: 0

In a typical day in the life of a product engineer, they have gone through the requisite wafer sort testing in manufacturing with the next step to assemble the resultant good die into their respective packages. While performing a series of parametric tests during final test, yield issues are encountered and the process of finding the source of the issues begins. Luckily, with access to a good d... » read more

Power-Aware Test: Beyond Low-Power Test
By Rahul Singhal - 11 Apr, 2023 - Comments: 0

By Rahul Singhal and Likith Kumar Manchukonda Power consumption is one of the key considerations when designing today’s semiconductor chips and systems. Over the years, the constant need for higher performance and more functions from the chips has been driving the continuous requirement for higher transistor density. The process node scaling makes this possible by reducing transistor sizes... » read more

Compiler Optimization Made Easy
By Nozar Nozarian - 07 Mar, 2023 - Comments: 0

In a previous blog post, we discussed the benefits of using automation to maximize the performance of a system. One use case I mentioned was compiler flag mining, and the fact that performance is available beyond the standard optimization flags provided by most compilers. Getting to this untapped performance is a difficult problem to solve, but fortunately there is an easy way. A universe of o... » read more

Scan Pattern Portability From PSV To ATE To SLT To IST
By Ash Patel - 30 Jan, 2023 - Comments: 0

By Ash Patel and Karthik Natarajan Chip testing has become increasingly complex due to the number of variables impacting designs – from design size and complexity, to high transistor counts on advanced technology nodes, to 2.5D/3D packaging, to manufacturing variability. All of these combine to make testing today's chips and packages more complicated than ever before. The number of test pa... » read more

Testability Analysis Based On Ever-Evolving Technology
By Pawini Mahajan - 06 Dec, 2022 - Comments: 0

The complexity of system-on-chip (SoC) designs continues to grow, so the corresponding design-for-test (DFT) logic required for manufacturing has become more advanced. Design teams are challenged by high gate counts and an array of internally developed and third-party IP integrated into their designs. Understanding if one can create high-quality manufacturing tests for these complex designs mus... » read more

Automotive Applications Demand Silicon Lifecycle Management
By Pawini Mahajan - 08 Nov, 2022 - Comments: 0

Every electrical engineer learns early in university studies that automobiles are a highly demanding environment for electronics. Temperature and humidity extremes, noise and vibration, electrical interference, exposure to alpha particles, and other factors all make it hard to design and manufacture chips that will operate properly under all conditions. These challenges are exacerbated as chips... » read more

Optimizing Vmin With Path Margin Monitors
By Ash Patel - 24 Oct, 2022 - Comments: 0

By Firooz Massoudi and Ash Patel Choosing the right operating voltage for various digital blocks within a semiconductor device is one of the most important tasks faced by chip designers. Operating voltage has major effects on performance, power consumption, and reliability. Increasing the voltage generally increases performance, but at the cost of more power and higher lifetime operating cos... » read more

Test Data Streaming For The Next Generation Of Designs
By Rahul Singhal - 08 Sep, 2022 - Comments: 0

Semiconductor chips have been evolving to meet the demands of rapidly transforming applications, and so has the test technology to meet the test goals of those chips. Going back two decades or so, the applications were limited and the designs were simpler, thus the concerns about power, performance and area (PPA), turn-around time, re-use and time-to-market, etc., were important but not as crit... » read more

Are You Leaving Performance On The Table? Here Is One Sure Way To Find Out
By Nozar Nozarian - 09 Aug, 2022 - Comments: 0

Compute platforms are always hungry for more performance. This is a fact that we simply cannot escape. Whether you are targeting high performance computing, IoT, mobile, or the automotive market, you need to unlock the best performance for your specific workloads. This relentless quest for performance comes with an unwelcome side effect: system complexity. As hardware becomes more capable, the ... » read more

Leverage Functional Interfaces For High-Speed Test Access During All Phases Of The Silicon Lifecycle
By Ash Patel - 12 Jul, 2022 - Comments: 0

Chip testing used to be straightforward. The development team used fault simulation to select a subset of the functional tests that could detect most possible manufacturing faults. These were translated to test patterns that ran on automated test equipment (ATE) to screen out defective dies at wafer test and bad packaged chips in final test. Lots of new technology was introduced over time, incl... » read more

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