Power-Aware Test Vector Porting For Production ATE

By Hari Mani - 12 Nov, 2024 - Comments: 0

Power management in contemporary system-on-chip (SoC) designs is almost unimaginably complex. Processors and other chip cores turn on and off as needed. Advanced features such as dynamic voltage and frequency scaling (DVFS) can adjust to changing conditions and incrementally adjust power and performance on the fly. Power management starts from the lowest hardware level of transistor structures ... » read more

Supporting Multiple Time Domains In SoC Production Test

By Hari Mani - 14 May, 2024 - Comments: 0

Complex system-on-chip (SoC) devices make every stage of the development flow harder, and the challenges continue even after the silicon is fabricated. Automatic test equipment (ATE) screening for defective wafers and assembled chips is always challenging. Production test engineers constantly struggle to minimize expensive test pattern memory, test each wafer or chip as quickly as possible, and... » read more