Power/Performance Bits: Oct. 20


Benchmarking quantum layout synthesis Computer scientists at the University of California Los Angeles found that current compilers for quantum computers are inhibiting optimal performance and argue that better quantum compilation design could help improve computation speeds up to 45 times. The team designed a family of benchmark quantum circuits with known optimal depths or sizes, which cou... » read more

Increase In Analog Problems


Analog and mixed signal design has always been tough, but a resent survey suggests that the industry has seen significantly increased failures in the past year because the analog circuitry within an ASIC was out of tolerance. What is causing this spike in failures? Is it just a glitch in the data, or are these problems real? The answer is complicated, and to a large extent it depends heavily... » read more

GDDR6 Memory For Life On The Edge


With the torrid growth in data traffic, it is unsurprising that the number of hyperscale data centers has grown apace. According to analysts at the Synergy Research Group, in July of this year there were 541 hyperscale data centers worldwide. That represents a doubling in the number since 2015. Even more striking, there are an additional 176 in the pipeline, so the breakneck growth in hyperscal... » read more

Machine Learning Enabled High-Sigma Verification Of Memory Designs


Emerging applications and the big data explosion have made memory IPs ubiquitous in modern-day electronics. Specifically, the demand for memories with low-die area, low voltage, high capacity, and high performance is rising for use by data center and cloud computing servers. This is essential to serve the exponentially growing connectivity boom and the latest emerging 5G based systems, includin... » read more

Effective Clock Domain Crossing Verification


As chips grow ever larger and more complex, gate count and amount of embedded memory grow dramatically. The number of clock domains is also increasing steadily. Several dozen different clocks are common in today’s chips, with some designs having more than a thousand domains. There are several reasons for this explosion: Multiple external interfaces with distinct clock requirements Lic... » read more

Simulate Automotive Radar In 5 Dimensions


Automotive radar has emerged as one of the backbone technologies in the automotive industry’s advanced driver assistance systems (ADAS) revolution. Because radar uses electromagnetic waves to sense the environment, it can operate over a long distance in poor visibility or inclement weather conditions. Designing automotive radar that accurately captures diverse traffic situations will be essen... » read more

Slower Metal Bogs Down SoC Performance


Metal interconnect delays are rising, offsetting some of the gains from faster transistors at each successive process node. Older architectures were born in a time when compute time was the limiter. But with interconnects increasingly viewed as the limiter on advanced nodes, there’s an opportunity to rethink how we build systems-on-chips (SoCs). ”Interconnect delay is a fundamental tr... » read more

Sensors Will Proliferate In SoCs


No one likes being put on the spot, and yet we all like a forecast…and as we all know, the only guarantee with a forecast is that it is wrong. Sports commentators have carved out a special niche for themselves with the ‘commentators curse:’ just as they extol the virtues of an individual or a team, the sporting gods prove them wrong in spectacular fashion! Governments are no better: econo... » read more

Searching For Power Bugs


How much power is your design meant to consume while performing a particular function? For many designs, getting this right may separate success from failure, but knowing that right number is not as easy as it sounds. Significant gaps remain between what power analysis may predict and what silicon consumes. As fast as known gaps are closed, new challenges and demands are being placed on the ... » read more

Unleashing The World’s Technology Potential


A year ago, as I prepared for my opening keynote at Arm TechCon, our biggest annual ecosystem gathering, we were already debating the event’s future focus. Complexity was driving new technology paths as we looked at how we’d engineer a global network of AI, IoT and 5G-driven devices from chip to cloud. We knew that dealing with that complexity would require fundamental changes in our techno... » read more

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