DDR5 MRDIMM: A Transformational Evolution For DDR5 DIMM


DDR5 is the latest generation of DDR server memory capable of supporting data rates of up to 9,200 Mbps, which is a huge leap over the previous generation of DDR memories. It is used in a wide variety of applications, with the huge server and data center market being the key driver behind the adoption of DDR5-based memory systems. As systems move towards more CPU cores, bandwidth, and capacity,... » read more

Building Edge AI with IP Solutions


As AI inference moves from centralized cloud infrastructure into vehicles, factories, medical devices, and industrial systems, the decisive design challenge shifts from model quality to field-ready implementation. Deployed edge AI systems must perform reliably under a range of constraints, including fixed power budgets, stringent latency requirements, limited or intermittent cloud connectivity,... » read more

Re-Architecting Die-to-Die IO For AI


By Lakshmi Jain and Wei-Yu Ma As AI-driven workloads continue to push the boundaries of compute scale, power efficiency, and bandwidth density, conventional die-to-die interconnect technologies—such as SerDes-based links and wide parallel IO—are increasingly becoming limiting factors. These approaches struggle to meet the growing demands for higher bandwidth density and improved energy e... » read more

Beyond The Demo: Deploying And Evaluating Open-Source AI Workloads


As more open-source AI models move closer to real-world adoption, developers are changing how they evaluate edge deployment. The question is no longer simply whether a model can run, but whether it can be deployed reproducibly on a concrete platform, observed in practice, and turned into meaningful deployment decisions based on actual technical evidence. For developers, the CIX Armv9 platfor... » read more

Shift-left Schematic Memory Contention Analysis


Insight Analyzer streamlines memory block design by enabling early detection of memory contention at the schematic level. This shift-left approach lets design teams optimize architectures, mitigate risks and address reliability concerns before layout and manufacturing, helping to avoid costly rework and delays. Designers gain actionable analysis and clarity for complex memory block structures, ... » read more

Foundation IP: Pushing the Boundaries of Energy-Efficient Chip Design


Access “Foundation IP: Pushing the Boundaries of Energy-Efficient Chip Design” to explore six articles that explain how to address SoC design challenges using advanced Foundation IP solutions. Learn how these approaches enable energy efficiency, high performance, and reliability across key applications such as mobile, IoT, AI, HPC, automotive, crypto, and networking. Why read this digest... » read more

PCIe Benefits From AI, Despite Scaling Protocols


Key takeaways: PCIe remains a critical technology for non-AI processing. For AI, PCIe will be strengthened by scale-out, agentic AI, and even some scale-up. CXL is seeing uptake, and some even think it could participate in AI processing. PCIe has been the go-to network for most data traffic moving from a processor to devices located elsewhere, which is also what the new data... » read more

Research Bits: June 8


Multi-tasking transistor Researchers at Pohang University of Science & Technology (POSTECH) developed a zinc oxide (ZnO) and tellurium (Te) heterojunction transistor technology that exhibits negative differential transconductance (NDT), where current decreases over a certain voltage range. By precisely controlling overlap length between the two materials, the team realized double negati... » read more

1 Megawatt Racks In Data Centers


The demand for performance in an AI data center is causing a huge spike in the amount of power being consumed. Within a rack are a half-dozen SoC components housed in different types of advanced packages and connected with an assortment of blazing-fast interface IP and optical signaling. Manmeet Walia, director of product management for mixed-signal PHY IP in the Synopsys Solutions Group, talks... » read more

Research Bits: Jun. 2


Integrated valleytronics device Researchers from Monash University designed a valleytronics circuit that can generate, direct, and read light-based information on a single chip. Potential applications include quantum computing, advanced imaging, and optical communication systems. “We employ a straightforward stacking approach to integrate ultrathin materials with metasurfaces, overcoming ... » read more

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