Author's Latest Posts

Building Scalable And Efficient Data Centers With CXL

The AI boom is giving rise to profound changes in the data center; demanding AI workloads are driving an unprecedented need for low latency, high-bandwidth connectivity and flexible access to more memory and compute power when needed. The Compute Express Link (CXL) interconnect offers new ways for data centers to enhance performance and efficiency between CPUs, accelerators and storage and move... » read more

Using A Retimer To Extend Reach For PCIe 6.0 Designs

One of the biggest changes that came with PCIe 6.0 was the transition from non-return-to-zero (NRZ) signaling to PAM4 signaling. Pulse Amplitude Modulation (PAM) enables more bits to be transmitted at the same time on a serial channel. In PCIe 6.0, this translates to 2 bits per clock cycle for 4 amplitude levels (00, 01, 10, 11) vs. PCIe 5.0, and earlier generations, which used NRZ with 1 bit p... » read more

Enabling New Server Architectures With The CXL Interconnect

The ever-growing demand for higher performance compute is motivating the exploration of new compute offload architectures for the data center. Artificial intelligence and machine learning (AI/ML) are just one example of the increasingly complex and demanding workloads that are pushing data centers to move away from the classic server computing architecture. These more demanding workloads can be... » read more

PCIe 6.0 Takes Data Center Performance To The Next Level

Looking back at 2022, we saw a major update to the PCI Express (PCIe) specification. PCIe 6.0 brought with it some of the most fundamental changes yet seen by the specification, resulting in some exciting capabilities that are set to take data center performance to the next level in the years ahead. PCIe has been the interconnect of choice in computing for two decades now. Its ongoing advanc... » read more