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ADAS Further Extends 7nm Challenges


As we discussed previously on the LPHP blog, 7nm nodes hold great promise for reducing power, improving performance and increasing density for next-generation chips, but also present a set of engineering challenges. When you factor in the standards set for autonomous vehicles (AV) and advanced driver assistance systems (ADAS) system-on-chips or SoCs, those challenges can more than double. Autom... » read more

High-Performance Memory At Low Cost Per Bit


Hardware developers of deep learning neural networks (DNN) have a universal complaint – they need more and more memory capacity with high performance, low cost and low power. As artificial intelligence (AI) techniques gain wider adoption, their complexity and training requirements also increase. Large and complex DNN models do not fit on the small on-chip SRAM caches near the processor. This ... » read more

5G Wireless Infrastructure Pushes High-Speed SerDes Protocols


5G is the 5th generation wireless system standard that, through high speeds and increased accessibility, promises to change the way we stream, communicate, work, and travel. Boasting speed capabilities of 20Gbps and network densities of 1 million connected devices per square kilometer, 5G is the required technology for the implementation of highly anticipated technologies like autonomous vehicl... » read more

Deep Learning Neural Networks Drive Demands On Memory Bandwidth


A deep neural network (DNN) is a system that is designed similar to our current understanding of biological neural networks in the brain. DNNs are finding use in many applications, advancing at a fast pace, pushing the limits of existing silicon, and impacting the design of new computing architectures. Figure 1 shows a very basic form of neural network that has several nodes in each layer that ... » read more

Navigating The Foggy Edge Of Computing


The National Institute of Standards and Technology (NIST) defines fog computing as a horizontal, physical or virtual resource paradigm that resides between smart end-devices and traditional cloud or data centers. This model supports vertically-isolated, latency-sensitive applications by providing ubiquitous, scalable, layered, federated and distributed computing, storage and network connecti... » read more

How AI Impacts Memory Systems


Throughout the 1980’s and early 1990’s computer systems were bottlenecked by relatively slow CPU performance, thereby limiting what applications could do. Driven by Moore’s Law, transistor counts increased significantly over the years, improving system performance and enabling exciting new computing possibilities. Although computing capabilities have advanced significantly in recen... » read more

GDDR6 PHYs: From The Data Center To Self-Driving Cars


The demand for ever-increasing bandwidth has resulted in a growing interest in GDDR across a number of market verticals, including data centers and the automotive sector. As an example of the former, deep learning applications require ever-increasing speed and bandwidth memory solutions in the data center. In deep learning and other emerging technologies, GDDR memory can help companies addre... » read more

The Data Center In 2018 And Beyond


As computing continues to evolve, a number of trends are continuing to challenge the design of conventional von Neumann architectures, and in turn are driving the development of new architectural approaches and technologies. These include the growing adoption of artificial intelligence (AI), machine learning, AR/VR, IoT, high-speed financial transactions, self-driving vehicles, and blockchain/c... » read more

Optimizing The Data Center With PCI Express 4.0


PCI Express (Peripheral Component Interconnect Express), also known as PCIe, is a high-speed serial computer expansion bus standard designed to replace older PCI, PCI-X and AGP bus standards. Officially launched in 2003, PCIe was rapidly adopted by chip, system and software designers and emerged as the dominant interface standard for connecting peripherals to the CPU. Modern CPUs rely on the... » read more

The Promises And Challenges Of 7nm


Despite a waning Moore’s Law and the increasing costs of advanced process nodes, the semiconductor industry is steadily approaching 7 nanometers (nm). The demand for 7nm is driving expected initial tape-outs from fabs by the end of 2017, with initial volumes beginning in 2018 and ramping up by 2019. Silicon fabbed on 7nm nodes will offer a number of benefits for chipmakers, including lower po... » read more

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