DDR5 12.8Gbps MRDIMM IP: Powering The Future Of AI, HPC, And Data Centers


The demand for higher-performance computing is greater than ever. Cutting-edge applications in artificial intelligence (AI), big data analytics, and databases require high-speed memory systems to handle the ever-increasing volumes and complexities of data. Advancements in cloud computing and machine virtualization are stretching the limits of current capabilities. AI applications hosted in the ... » read more

HBM3E: All About Bandwidth


The rapid rise in size and sophistication of AI/ML training models requires increasingly powerful hardware deployed in the data center and at the network edge. This growth in complexity and data stresses the existing infrastructure, driving the need for new and innovative processor architectures and associated memory subsystems. For example, even GPT-3 at 175 billion parameters is stressing the... » read more

PCIe 6.0 Address Translation Services: Verification Challenges And Strategies


Address Translation Services (ATS) is a mechanism in PCIe that allows devices to request address translations from the Input/Output Memory Management Unit (IOMMU). This is particularly important where devices need to access virtual memory. ATS enhances performance by enabling devices to cache translations, reducing the latency associated with memory access. This blog delves into the semantics ... » read more

PCIe 7.0 Takes Center Stage At PCI-SIG DevCon ’24


From the simplest building blocks like GPIOs to the most advanced high-speed interfaces, IP subsystems are the lifeblood of the chipmaking ecosystem. A key enabler for IP has been the collaboration between industry and academia in the creation of standards and protocols for interfaces. PCI-SIG drives some of the key definitions and compliance specifications and ensures the interoperability of i... » read more

How Quickly Can You Take Your Idea To Chip Design?


Gone are the days of expensive tapeouts only done by commercial companies. Thanks to Tiny Tapeout, students, hobbyists, and more can design a simple ASIC or PCB design and actually send it to a foundry for a small fraction of the usual cost. Learners from all walks of life can use the resources to learn how to design a chip, without signing an NDA or installing licenses, faster than ever before... » read more

LPDDR5X Opening New Markets For Low-Power DRAMs


Low-power DDR SDRAM has been one of the most widely used memories in the semiconductor market. This blog post talks about the evolutions of LPDDR DRAMs leading to the latest published standard of LPDDR5/5X. We also look at some of the traditional markets for LPDDR devices and how LPDDR5X is opening new specialized markets for the LPDDR DRAMs. History of LPDDR devices The first LPDDR standard,... » read more

Flash Memory Demystified: NOR Flash Vs. NAND Flash


By Dharini SubashChandran and Shyam Sharma In the world of flash memory, two primary types dominate the market: NOR flash and NAND flash. While they both serve as essential components in various electronic devices, they differ significantly in terms of structure, functionality, and use cases. In this blog post, we will explore the fundamental differences between NOR flash and NAND flash. ... » read more

Expecting The Unexpected: Analyzing A Data Center Cooling Failure


Data center thermal management is often a reactive process. Servers issue warning messages, monitoring alarms activate, or employees express concern about general temperature levels/hotspots and then management decides what to do next. For incremental issues, once known, the necessary steps can be taken to resolve or improve these issues; however, what happens when a potential thermal issue onl... » read more

Multi-Chiplet Marvels: Exploring Chip-Centric Thermal Analysis


The relationship between power consumption and thermal dynamics for chips is intricate. As power is consumed during the operation of a chip, it results in the generation of heat. This heat may dissipate from the device, metal routing, or the die itself, leading to increased temperatures on the chip. The dissipation process perpetually expends redundant energy, thereby compromising on the overal... » read more

Decoding GDS To Thermal Model Conversion


Driven by Moore’s Law and modern, ubiquitous computation power demand, the market will continue to demand higher chip performance. Therefore, modern chips with ever-higher power densities present critical thermal challenges. With the ever-shrinking design margins, designers must manage their thermal budget at every stage of the design, from chip to system. Now, let us shift left and start ... » read more

← Older posts