Special Report
What’s Wrong With Power Signoff?
Where and why designs go awry and how to avoid some increasingly common problems.
Top Stories
What Exactly Is The IoT?
Beyond the hype: The vision, what’s missing, and what else is needed to make the Internet of Things fulfill its promise.
S-L Power Modeling Gains Steam
A system-level power model would enable power architecture planning. EDA, IP and systems companies are coming together to determine where to go next.
Tougher Memory Choices
The importance of memory, especially if users stay at 28nm, plus issues such as security and place and route.
Beyond The DAC Keynote
Imagination’s CEO and director of technology marketing talk about the growing role of IP and why that IP is so important for system design.
Blogs
Editor in chief Ed Sperling questions how far you can afford to be from your data and why that impacts power and performance in Money, Hackers And Lawyers.
Executive Editor Ann Steffora Mutschler observes that the question of whether power really takes top priority boils down to definitions, in Power IS Top Priority, Isn’t It?
Cadence’s Brian Fuller says that until new standards, platforms and approaches are in place, expect some turbulence in Computer Vision’s Enormous Challenges Ahead.
Mentor Graphics’ Chetandeep Singh and Ravi Tangirala team up to explain why early and accurate power analysis is critical in As Nodes Advance, So Must Power Analysis.
Synopsys’ Namit Gupta contends the only way low-power CDC paths can be checked at RTL is if the CDC tool can infer the power network from the UPF description in Rethinking Low Power Verification: LP + CDC Verification.
Ansys-Apache’s Aveek Sarkar says finFETs improve performance and reduce energy consumption, but they also add new design challenges, in FinFET-Based Designs: Package Model Considerations.
ARM’s Ellie Stone predicts that wearable technology could become as large over the next decade as the mobile market is today in Processor IP Enabling The Wearable Trend.
Sponsor White Papers
Low-Power, High-Performance Memory Systems
Implementation challenges and solutions: A look at the trends and electrical requirements associated with increasing memory demands and speed.
System-Aware SoC Power, Noise And Reliability Sign-off
Accurately predicting chip power and noise requires a consideration of the entire power delivery network.
