Top Stories
5nm Design Progress
Improvements in power, performance and area are much more difficult to achieve, but solutions are coming into focus.
Architecting For AI
Experts at the Table, part 1: What kind of processing is required for inferencing, what is the best architecture, and can they be debugged?
Five DAC Keynotes
Thought-provoking talks about the future of technology, how to improve it, and what it means for design engineers.
Videos
Aging Effects
How to model circuit degradation at advanced nodes.
In-Design Power Rail Analysis
What can go wrong with power analysis at advanced nodes.
Blogs
Editor In Chief Ed Sperling questions how much energy billions of complex devices will require, in Energy At The Edge.
Mentor’s Progyna Khondkar explains how to make debug more efficient, in Power-Aware Static Checks: Static Checker Results And Debugging Techniques.
Moortec’s Ramsay Allen points to techniques for optimizing in-chip conditions, in Explaining Adaptive Voltage Scaling And Dynamic Voltage Frequency Scaling.
Synopsys’ Ron DiGiuseppe shows how to meet safety requirements for changing automotive SoC architectures, in Enabling Integrated ADAS Domain Controllers With Automotive IP.
Arm’s Jakub Lamik looks at which capabilities consumers are expecting in the next generation of mobile devices, in Five Features Of The ‘Always On’ Mobile Experience.
