Top Stories

Slower Metal Bogs Down SoC Performance
Interconnects are becoming the limiter at advanced nodes.

Searching For Power Bugs
To find wasted power means you understand what to expect, how to measure it, and how it correlates to real silicon. We are further from that than you might expect.

Confusion Grows Over Packaging And Scaling
The number of options is increasing, but tooling and methodologies haven’t caught up.

Blogs

Rambus’ Frank Ferro walks through the benefits of combining real-time interactivity and AI/ML inferencing for ultra-low latency applications like cloud gaming, in GDDR6 Memory For Life On The Edge.

Mentor’s Nebabie Kebebew shows how variation-aware memory verification with brute-force Monte Carlo accuracy can be done in much less time, in Machine Learning Enabled High-Sigma Verification Of Memory Designs.

Synopsys’ Rahul Chirania examines constraints for accurate CDC analysis and reduced need for waivers without manual inspection, in Effective Clock Domain Crossing Verification.

Ansys’ Ushemadzoro Chipengo points to the need for highly accurate synthetic radar returns from full-scale traffic scenes, in Simulate Automotive Radar In 5 Dimensions.

Moortec’s Tim Penhale-Jones observes that as geometries shrink, the ability to monitor what’s going on in a device becomes increasingly important, in Sensors Will Proliferate In SoCs.

Arm’s Simon Segars advocates bringing together hardware engineers and software designers with an accessible technology platform, Unleashing The World’s Technology Potential.

Cadence’s Paul McLellan writes about speeding up the path to final emissions and susceptibility compliance with early software-based testing, in Testing For Electromagnetic Compliance Without An Anechoic Chamber.