Special Report
Power Complexity On The Rise
New architectures, different markets and more variables make it increasingly difficult to design and verify low-power chips.
Top Stories
The Challenge Of Defining Worst Case
What are the worst-case conditions for a chip, and should you worry about them? Of course, it is a little more complicated than that.
Speeding Up 3D Design
Why the chip industry is plowing ahead with advanced packaging and what can be done to improve it.
Blogs
Editor In Chief Ed Sperling contends that while AI can speed up chips, it’s not always obvious where and for how long, in AI’s Impact On Power And Performance.
Fraunhofer EAS’s Roland Jancke finds that improved quality begins with the combination of different models and previously separated domains into a comprehensive virtual design platform, in Virtual System Development Platforms For Safeguarding Complex Microelectronic Systems.
Rambus’ Frank Ferro describes balancing tradeoffs between bandwidth, capacity and power-efficiency, in GDDR6 Pushes The Memory Envelope For AI And ADAS.
Mentor’s Chris Kwok, Priya Viswanathan, and Ping Yeung explain how hard-to-catch reset bugs call for static analysis, simulation, and formal analysis used in concert, in Three Steps To Complete Reset Behavior Verification.
Synopsys’ Pieter van der Wolf and Dmitry Zakharov lay out what’s needed for performing inference efficiently in low/mid-end edge devices, in Implementing Low-Power Machine Learning In Smart IoT Applications.
Arm’s Steve Roddy argues that we need to design systems capable of dynamically adjusting the type—not just the speed—of processing resource they can deliver, in Scalable Platforms For Evolving AI.
Moortec’s Stephen Crosher sketches out important considerations to make when determining where to place thermal monitoring sensors on a chip, in Finding Hotspots In AI Chips.
Adesto’s Jen Bernier-Santarini says creating a campus-wide access system can mean managing hundreds of devices networked together, in Building Access Control With Free Topology.
Sponsor White Paper
Building Quantum Espresso With Arm Compiler
How to build Quantum Espresso with Arm Compiler for HPC.
