Special Report
Die-to-die Interconnect Standards In Flux
Many features of UCIe 2.0 seen as “heavy” are optional, causing confusion.
Top Stories
Development Flows For Chiplets
A chiplet economy requires standards, organization, and tools — and that’s a problem.
AI Accelerators Moving Out From Data Centers
Chiplets will be a key enabler for customizing designs at every level, from edge devices to the cloud. AI is a key driver, but it’s not the only one.
Opinion
Power architect Barry Pangrle looks at what’s new and noteworthy in the foundry’s aggressive technology roadmap, in TSMC Tech Symposium 2025.
Sponsor Blogs
Fraunhofer’s Benjamin Prautsch explains how improving parasitic estimation and enabling partial layout extraction earlier in the design process leads to better optimization, in Optimizing Analog With Layout In The Loop.
Siemens’ Chandu Challapalli highlights the challenges associated with verifying power intent for complex devices, in Best Practices For Power-Aware Verification: Because Designing For Low Power Is Only Half The Battle.
Rambus’ Nidish Kamath digs into the latest HBM standard, which provides improved memory bandwidth, capacity, power efficiency, and reliability, in HBM4 Elevates AI Training Performance To New Heights.
Quadric’s Steve Roddy discusses how bolting a matrix accelerator onto existing processor IP leads to long-term challenges for companies, in Trapped By Legacy.
Arm’s Cornelius Maroa provides a step-by-step tutorial for enabling fast, efficient inference close to where the data is generated, in Deploying PyTorch Models On Edge Devices.
Synopsys’ Lakshmi Jain and Wei-Yu Ma discuss why advanced testing methodologies and enhanced testing equipment are needed to ensure signal integrity, accuracy, and optimal performance in complex chip designs, in High-Speed Test IO: Addressing High-Performance Data Transmission And Testing Needs For HPC & AI.
Cadence’s Sangeeta Soni examines the impacts of the release of the UALink 200G 1.0 Specification, in UALink: Powering The Future Of AI Compute.
Ansys’ Mehru Singh and Tim Ebdon explains why sustainable products are key to a company’s success in design, manufacturing and sourcing, and consumer experience, in How To Optimize Products For Performance And Sustainability.
Sponsor White Papers
MIPI in FPGAs for Mobile-Influenced Devices
Conditions where FPGAs are a solid design choice, what implementation of MIPI in FPGAs looks like, and some use cases for designers.
Impact of AI On IP And Chip Design
AI growth trends, market predictions, and current silicon chip design innovations, while also emphasizing the critical importance of security in supporting massive AI workloads.
Report: The Future of AI Processing
How heterogeneous compute is enabling new use cases and unlocking AI at the edge now and into the future.
Innovus+ Synthesis And Implementation System
Integrated RTL to GDS chip design environment.
E-Powertrain EMC Design And Validation
How simulation tools can assist in the design of the e-powertrain and its electronic systems.
Intent Meets Implementation
Verifying complex power strategies with UPF 4.0.
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