Top Stories
Can Nano-Patterning Save Moore’s Law?
Selective deposition is showing promise in the lab, but it’s a long way from there to production.
Why Packaging Matters
As semiconductor designs become more complex and unique, so do the packages around those chips.
Measuring FinFETs Will Get Harder
No one tool does everything, and the best tools for the job are slow.
Inside Multi-Beam E-Beam Lithography
One-on-one: David Lam sounds off on next-generation lithography and how to solve some very difficult problems.
Blogs
Editor In Chief Ed Sperling predicts the push into 2.5D and fan-outs will launch a new round of fireworks, in Packaging Wars Ahead.
Executive Editor Mark LaPedus digs into emerging measurement technology for complex chip structures, in Inside X-Ray Metrology.
Technical Editor Katherine Derbyshire finds litho problems at advanced nodes are not just due to photons, in What’s Really Causing Line-Edge Roughness?
Contributing Editor Michael Watts explores the commercial uses and current research for the latest memory type, in ReRAM Gains Even More Steam.
Mentor Graphics’ Srinivas Velivala points to some tutorial videos that address some common problems in verification, in You’re Not Alone.
Imec’s Marc Heyns contends that 10 years from now, CMOS will seem as old-fashioned as vacuum tubes, in What Comes Next.
SEMI’s Karen Savala observes that failure to ramp yield can have disastrous consequences, in The Growing Role Of Extended Supply Chain Collaboration.
Semico Research’s Rich Wawrzyniak explains why GlobalFoundries new 14LPP process is so important, in The Silicon Foundry Market Is Alive And Well.
