Top Stories

Is Cloud Computing Suitable For Chip Design?
Semiconductor design lags behind other industries in adopting the cloud, but there could be some good reasons for that. Change is difficult.

Betting Big On Discontinuity
Mentor’s CEO looks at the impact of AI and machine learning, what’s after Moore’s Law, and the surge in EDA and semiconductors.

Domain Crossing Nightmares
Experts at the Table, part 1: How many domain crossings exist in a typical SoC today and when is the right time to verify their correctness?

Blogs

Editor In Chief Ed Sperling finds general-purpose processors under pressure as demand for application-specific chips accelerates, in What Will Intel Do Next?

Technology Editor Brian Bailey questions how to balance risk in semiconductor design against the threat of commoditization, in The Perfect Risk.

Synopsys’ Taigon Song looks at what the latest transistor types will mean for IC designers, in A Paradigm Shift With Vertical Nanowire FETs For 5nm And Beyond.

Mentor’s Wei-Lii Tan explains why machine learning can improve the traditional process for verifying Liberty files, in Next-Generation Liberty Verification And Debugging.

OneSpin’s Sergio Marchese argues that formal verification of FPUs is no longer a prerogative of big companies spending big bucks, in AI Chips Must Get The Floating-Point Math Right.

Cadence’s Frank Schirrmeister contends that verifying AI behaves as intended will become an important safety issue, in The Revenge Of The Digital Twin.

Aldec’s Farhad Fallahlalehzari shows how to build an automotive vision monitoring system using FPGAs, in Giving Cars A Bird’s-Eye View.

eSilicon’s Mike Gianfagna points to the first publication demo of a new IP block, in 56G 7nm SerDes: Eyewitness Account.