Top Stories

Utilizing Computational Memory
How processing near memory could change the compute landscape.

IP Management And Development At 5/3nm
Just because IP worked in the past doesn’t mean it will work in a derivative design at a new node.

RISC-V Challenges And Opportunities
Who makes money with an open-source ISA, the current state of the RISC-V ecosystem, and what differentiates one vendor from the next.

Blogs

Editor In Chief Ed Sperling contends that edge computing will change the basic structure of systems, in Disaggregation Of The SoC.

Technology Editor Brian Bailey observes that the industry lacks a methodology for effectively using abstraction in verification, but that may be changing, in Abstract Verification.

Cadence’s Frank Schirrmeister questions why high-level synthesis and transaction-based development beyond RTL haven’t happened yet, in Does System Design Still Need Abstraction?

Mentor’s Jean-Marie Brunet finds that many blocks must work together seamlessly for 5G SoCs to perform effectively, creating complex test challenges, in 5G Needs Cohesive Pre- And Post-Silicon Verification.

Synopsys’ Mary Ann White explains why a pivot to the rapidly growing automotive market means new requirements for software tools used in design, in Functional Safety Implementation Goes Mainstream.

Aldec’s Wojtek Lewandowski shows how to comprehensively test heterogeneous SoCs using QEMU, in HW/SW Co-Verification For Hybrid Systems.

Silexica’s Zubair Wadood compares hand-optimization with tool-based optimization, in Using HLS To Improve Algorithms.