Top Stories

Universal Verification Methodology Running Out Of Steam
It’s time to move up in abstraction again as a complexity overwhelms a key approach.

Open-Source Verification
Part 1: Sorting out what is meant by open-source verification is not as easy as it should be, but to some that leaves the door open to new approaches.

RISC-V Gaining Traction
Experts at the Table: Extensible instruction-set architecture is drawing attention from across the industry and supply chain.

Blogs

Technology Editor Brian Bailey observes that science and engineering form a partnership in which each discipline relies on and works with the other to get to useful products, in Engineering Within Constraints.

Cadence’s Frank Schirrmeister sees hyperscale computing and a focus on the interaction between domains pushing math-based analysis to the forefront, in Computational Software: The Foundation Across Software Disciplines.

OneSpin’s Saša Stamenković promotes an online, free event that will explore solutions to the challenge of integrating in-house and third-party IPs into complex SoCs, in IP Integration Verification At DVClub Europe.

Mentor’s Mika Castren advises how to ensure pre- and post-silicon verification complies with developing 5G standards, in Running With O-RAN.

Aldec’s Alex Gnusin explains how to validate design code robustness without running simulations, in Linting RISC-V Designs.

Imagination’s Mike Barnes demonstrates making an automotive safety assistance feature more realistic and informative, in Smarter, Safer Surround-View For Cars.