Top Stories
Improving Verification Methodologies
The verification problem space is outpacing the speed of the tools, placing an increasing burden on verification methodologies and automation improvements.
Lines Blurring Between Supercomputing And HPC
Acceleration of performance improvements due to AI and disaggregation are driving significant changes at the leading edge of computing.
Multi-Die Design Complicates Data Management
Design data and metadata are ballooning, and no one is quite sure how long to save it or what to delete.
Universities Augment Curricula To Boost Graduates’ Employability
Companies need engineers across all disciplines and universities are stepping up to deliver them; schools reap benefits, too.
Tech Talk Video
Cracking The Memory Wall
How faster data movement can impact overall system performance.
Opinion
Technology editor Brian Bailey suggests risk and fear go hand in hand within the semiconductor industry, and reducing them requires a balance against time and cost, in The Price Of Fear.
Sponsor Blogs
Siemens EDA’s Todd Burkholder, Wael Abdelaziz Mahmoud, Tom Fitzpatrick, Vishal Baskar, and Mohamed Nafea show how to create reusable and adaptable verification scenarios across multiple platforms, in Simplifying HW/SW Co-Verification With PSS Led UVM And C Tests.
Cadence’s Subash Peddu digs into HBM subsystems and why every fractional increase in performance has a multiplier effect on overall AI hardware performance, in AI’s Rapid Growth: The Crucial Role Of High Bandwidth Memory.
Keysight’s Emily Yan finds that rapid AI innovations are putting unprecedented strain on data center networks, with issues around interconnects, high costs, and validation, in Key Challenges In Scaling AI Clusters.
Synopsys’ Shekhar Kapoor expects that advancements in low-latency interconnects, manufacturing processes, and design tools will enable a proliferation of 2.5D and 3D designs, in Bold Prediction: 50% Of New HPC Chip Designs Will Be Multi-Die In 2025.
Arteris’ Rick Bye details the benefits of Smart NoCs, including the ability to automatically generate, optimize, and verify interconnects with minimal manual effort, in Top 5 Reasons Engineers Need A Smart NoC.
Sponsor White Papers
Introduction To Voltage Droop And Mitigation
What is voltage droop, how to measure it, and is your mitigation system sufficient?
A Novel Approach For Hardware-Software Co-Verification
Leveraging PSS to orchestrate UVM and C tests.
Pre-Silicon Verification Of Die-to-Die IP With Novel ESD Protection
Proof of concept for a novel protection method, as an essential supplement to PERC in designs containing die-to-die IP.
Boost SoC Efficiency And Speed With FlexGen Smart NoC IP Automation
The challenges of manual NoC implementation and how smart automation improves NoC performance.
Thermal Analysis Of 3D Stacking And BEOL Technologies With Functional Partitioning Of Many-Core RISC-V SoC
Material properties of embedded micro-bumps and wafer-to-wafer hybrid bonding on the thermal behavior of the package stack in 3D-ICs.
Testing Analog And Digital Components In Modern PCBAs
Techniques and approaches for comprehensive circuit validation.
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