Special Report
Rethinking Chip Reliability For Harsh Conditions
Shift right, then left is becoming more common for test and inspection in mission- and safety-critical applications.
Top Stories
Challenges In Using Sub-7nm ICs In Automotive
Targeted design for test, better fault models, and in-system testing must keep pace with advanced-node components.
High-Quality Data Needed To Better Utilize Fab Data Streams
Engineers require timely and aligned data with just the right level of granularity.
Video
Problems In Testing AI Chips
Reliability depends on consistency in contacts and clean signals.
Sponsor Blogs
Onto Innovation’s Cheolkyu Kim finds sub-10μm metrology is now required for RDL and bond pads, in Front-End Technologies Are The New Back-End Tools: Using Picosecond Ultrasonics Technology For AI Packages, Part 1.
Siemens’ Ashrith Harith shows why pseudo-random testing patterns are inadequate for meeting the stringent requirements of automotive electronics, in In-System/In-Field Testing Using High-Quality Deterministic Test Patterns.
PDF Solutions’ Christophe Begue contends that early engagement and integrated analytics will be critical for success in future semiconductor development, in Tackling Advanced Chip Manufacturing Challenges.
Synopsys’ Pawini Mahajan digs into the testability analysis required by ISO 26262, in The Challenges Of Testing Automotive Chips.
proteanTecs’ Alex Burlak notes that machine learning can identify early indicators of risk by analyzing timing margin data from within the chip, in Can Your ATPG Do This? Cut Defects Escaping Detection With ML.
Advantest’s Roberto Colecchia examines data feed forward and its role in real-time test optimization, in The Data Dilemma In Semiconductor Testing And Why It Matters: Part 1.
Sponsor White Paper
Stress-Related Local Layout Effects In FinFET Technology And Device Design Sensitivity
The impact of stress, developed during finFET device fabrication, on electrical characteristics of transistors manufactured in 7nm silicon finFET technology.
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