Top Stories

Chip Dis-Integration
Continued integration is no longer the natural way forward for semiconductors. What needs to happen to make it easier?

Near-Threshold Issues Deepen
Process variation plus timing are adding to low-power challenges at the most advanced nodes.

Complexity, Reliability And Cost
Fraunhofer EAS’s top scientist digs into new technical and business challenges shaping the semiconductor industry.

Videos

Tech Talk: Data-Driven Design
How more data is shifting memory architectures.

Blogs

Editor In Chief Ed Sperling takes a peek inside the world’s fastest computer and explains why supercomputing now matters to many more people, in Blazing-Fast Performance.

Helic’s Magdy Abadir finds disagreement about the impact of crosstalk on today’s large mixed-signal designs, in Is It Time To Take Inductance And Electromagnetic Effects Seriously?

ANSYS’ Annapoorna Krishnaswamy points to the need for new methodologies to deal with increased variability at advanced nodes, in Beyond Signoff.

Fraunhofer’s Stephan Gerth looks at why it’s important to incorporate reliability information into the concept phase, in Upcoming System Modeling Challenges.

Moortec’s Ramsay Allen examines the impact of designing for worst-case process variation and why it can erode the gains made by migrating to an advanced node, in Process Detection & Variability.

Rambus’ Mondeep Thiara shows why reducing SerDes latency variation and jitter is necessary for long-reach networking applications, in 5G Wireless Infrastructure Pushes High-Speed SerDes Protocols.

Arm’s Paul Williamson zeroes in on the hardware, software and security choices available to IoT developers, in Seven Steps To Build A Successful IoT Solution.