Top Stories

Power Limits Of EDA
Tools aid with power reduction, but they can only tackle small savings in a locality. To do more would require a new role for the EDA industry.

Betting On Power And Deep Learning
A very candid conversation with VC Jim Hogan about returns on invested capital.

Seeing The Future Of Vision
Self-driving cars and other uses call for more sophisticated vision systems.

Getting The Power/Performance Ratio Right
Concurrent power and performance analysis is essential, but the path there is not always straightforward.

Blogs

Editor In Chief Ed Sperling finds that as new compute and chip architectures roll out some classic tradeoffs are changing, in Low Power Plus Better Performance.

Ansys’ Youngsoo Lee digs into why the ‘throw-it-over-the-wall’ approach no longer works and what needs to take its place, in Why Do You Need Chip-Package-System Co-Design And Co-Analysis?

Cadence’s Steve Carlson observes that more complex power management techniques are impacting system performance in ways that are complicated to predict, in How Software-Driven Tests Support Concurrent Power/Performance Analysis.

ARM’s James Scobie examines how to reduce the complexity of managing safety-critical code, in Simplifying Software Separation With Real-Time Virtualization.

Rambus’ Steven Woo argues that exploring new system architectures will be necessary for the IoT, in From The Data Center To The Mobile Edge.

Synopsys’ Angela Raucher points out why processor selection and configuration are so critical, in Balancing Performance And Energy Consumption For IoT Applications Processors.

Mentor Graphics’ Rizwann Farooq look at a new approach to in-circuit emulation, in Deterministic ICE App Tackles ICE Limitations.