Top Stories

Designs Beyond The Reticle Limit
Chips are hitting technical and economic obstacles, but that is barely slowing the rate of advancement in design size and complexity.

Dealing With Sub-Threshold Variation
The value and challenges of circuits being not quite on or off.

Difficult Memory Choices In AI Systems
Tradeoffs revolve around power, performance, area, and bandwidth.

Blogs

Fraunhofer’s Andy Heinig foresees the need to move from classic encryption algorithms with increasing key lengths to communication based on entangled quanta, in Electronics For Quantum Communications.

Mentor’s Progyna Khondkar describes a method for building low-power verification platforms using UPF information models and dynamic objects, in Customizing Low-Power Platforms Using UPF Dynamic Properties.

Arm’s James Myers digs into the greatest challenge the Internet of Things faces – how those ‘things’ will be powered, in Building Billions Of Batteryless Devices.

Rambus’ Joseph Rodriguez reviews why this interface is no longer just about mobile phones, in The Expanding Universe Of MIPI Applications.

ANSYS’ Josh Akman walks through the early proactive steps that ensure that a design can be consistently manufactured with a minimum number of defects, in Design For Manufacturing Best Practices.

Cadence’s Paul McLellan looks into recently announced high-end processors that are pushing performance capabilities to the forefront, in Arm Goes For Performance.

Synopsys’ Rahul Deokar explains why process variability, physical effects, and the impact of interconnect are critical in timing analysis, in The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing Signoff.

Moortec’s Tim Penhale-Jones anticipates that as geometries shrink, the ability to monitor what’s going on in a device is increasingly important, in Sensors Will Proliferate In SoCs.