Special Report
Reliability Concerns Shift Left Into Chip Design
Goals include offsetting rising manufacturing costs and limiting liability over longer lifetimes.
Top Stories
The High But Often Unnecessary Cost Of Coherence
Cache coherency is expensive and provides little or negative benefit for some tasks. So why is it still used so frequently?
Challenges With Stacking Memory On Logic
Gaps in tools, more people involved, and increased customization complicate the 3D-IC design process.
Setting Ground Rules For 3D-IC Designs
The few designs to reach silicon today are completely customized, with inconsistent tool support. That has to change for this packaging approach to succeed.
Industry Transforming In Ways Previously Unimaginable
As we look back over 2021, there have certainly been some surprises, but the industry continues to take everything in its stride.
Domain-Specific Design Drives EDA Changes
Number of options grows, but so does uncertainty about whether these designs will work and how much they will ultimately cost.
Blogs
Technology Editor Brian Bailey takes a look back at the most popular categories and articles published in ‘Systems and Design’ and ‘Low Power-High Performance’ during 2021, in The Past Predicting The Future.
Synopsys’ Robert Parris surveys the evolution of FPGA prototyping from build-your-own efforts to highly automated solutions, in The Third Generation Of FPGA Prototyping.
Cadence’s Frank Schirrmeister warns that companies must cooperate to solve critical challenges and enable new solutions, in Sustainability, Ecosystems, And Consumer Requirements In 2022.
Siemens EDA’s Nebabie Kebebew shines a light on a faster path to silicon success, in EDA In The Cloud Is Driving Semiconductor Innovation.
Codasip’s Rupert Baines finds the RISC-V market ripe for domain-specific designs, in Growth And Enthusiasm At The RISC-V Summit 2021.
White Papers
Taking 2.5D/3DIC Physical Verification To The Next Level.
Using physical verification checks to verify die alignments and identify systemic errors.
Holistic FMEDA-Driven Safety Design And Verification For Analog, Digital, And Mixed-Signal Design
The Midas Safety Platform as part of an integrated safety flow to enable a FMEDA-driven safety methodology.
Flexible USB4-Based Interface IP Solution For AI At The Edge.
A small area AI accelerator that can be re-used in multiple applications.
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