Top Stories

An Increasingly Complicated Relationship With Memory
Pressure is building to change the programming paradigm associated with memory, but so far economic justifications have held back progress.

The Challenges Of Building Inferencing Chips
As the field of AI continues to advance, different approaches to inferencing are being developed. Not all of them will work.

The Cost Of Programmability
How much flexibility should be incorporated in a chip and at what level should it be programmable? Those questions are getting more complicated.

Blogs

Editor In Chief Ed Sperling observes that restrictive design rules no longer apply, for better or worse, in Chip Design Is Getting Squishy.

EDA Technology Editor Brian Bailey makes the case for a new breed of engineers who can understand both hardware and software, not just firmware, in A New Breed Of Engineer.

Cadence’s Frank Schirrmeister examines what’s changed – and what hasn’t – in the past 30 years of software, in Is There Finally A Silver Bullet For Software?

Mentor’s Wei-Lii Tan digs into why validating LVF data for accuracy and correctness is a key factor to achieving timing closure and silicon success, in Timing Library LVF Validation For Production Design Flows.

OneSpin’s Sergio Marchese looks at the risk of hardware Trojans lurking in open-source and third-party IP, in Keep The Wooden Horse Out Of Your Chip.

Synopsys’ Taruna Reddy looks at what happens when you can’t count on ever-faster processors to improve simulation performance, in Simulation: Go Parallel Or Go Home.

Imagination’s Shewan Yitayew digs into the new features in BLE 5.2 that will enable new uses cases and transform the way we consume and share audio, in Bluetooth LE Audio Makes Its Debut.

Aldec’s Michelle Mata explains why early and accurate hardware and software co-verification can eliminate several ARM-based SoC challenges, in SoC Co-Emulation Using Zynq Boards.