Top Stories
Memory Wall Gets Higher
With SRAM failing to scale in recent process nodes, the industry must assess its impact on all forms of computing. There are no easy solutions on the horizon.
Data Boom Puts Pressure On NoCs, Fabrics
New adaptive, mesh NoC topologies are enabling chip designers to optimize data movement in complex SoCs and multi-die systems.
AI Won’t Kill Verification IP, But It Will Redefine It
As agentic AI boosts productivity and shifts verification bottlenecks, trusted verification IP remains the foundation that captures decades of protocol expertise while evolving to meet rising complexity.
AI Design Reshapes Data Management
AI is impacting semiconductor design in terms of workflows, new roles, and unique data management challenges.
Video
New Challenges In Signoff
What else to consider before sending a design to manufacturing.
How AI Will Automate Chip Design
Step-by-step application of AI in EDA.
Opinion
Technology editor Brian Bailey contends that any software which claims to be independent from hardware is inefficient and bloated, in All Software Is Hardware-Dependent.
Sponsor Blogs
Baya Systems’ Saurabh Gayen explains why inference is reshaping data center architectures, introducing new and less forgiving network requirements, in AI Workloads Are Turning The Data Center Network Into A Combined Memory And Storage Fabric.
Synopsys’ Madhumita Sanyal digs into complex parasitic interactions caused by vertical signal paths, in IP Requirements Evolve For 3D Multi-Die Designs.
Movellus’ Hari Mani, and Siemens’ Henrique Mendes and Robert Wilcox, highlight the importance of observing changes in the physical power delivery network and correlating them with functional behavior, in Detect, Diagnose, And Debug Using Sensors And Functional Monitoring.
Arteris’ John Elliott finds that security can no longer rely on assumptions or isolated checks as hardware complexity increases, in Importance Of Hardware Security Verification In Pre-Silicon Design.
Cadence’s Hamid Shojaei shows why verifying individual blocks before subsystem integration allows engineers to focus on complex system-level interactions, in Shift Verification Left: AI Tools For Faster, Smarter Chip Design.
Siemens’ Karen Chow details how robust extraction empowers semiconductor innovation at the most complex nodes, in Precision In Depth: Extraction Workflows For CFETs And Buried Power Rails.
Keysight EDA’s Stephen Slater examines how massively parallel GPU execution allows large FEM matrix systems to run efficiently, in Removing The Accuracy And Time Tradeoff In EM Simulation.
Sponsor White Papers
The Future Of Semiconductors: Engineering In The Convergence Era
Reflections from inside an industry undergoing its biggest transformation in decades.
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