Top Stories
AI Accelerator Testing Depends On DFT Innovations
Multi-die assemblies greatly increase the number of things that can go wrong, and the difficulty of finding them.
Smart Test Collides With The Data Chain
Increasing complexity is limiting the ability of machine learning models to effectively utilize test data.
HBM Shifts Testing Left To Preserve AI Chip Yield
Testing sooner and more often can improve quality and reduce scrap, but it’s also more costly.
Video
System-in-Package Challenges
Engineering considerations in multi-chiplet designs.
Sponsor Blogs
PDF Solutions’ Greg Prewitt and Marc Jacobs discuss how the industry’s machine learning aspirations are running ahead of the data plumbing needed to support them, in What’s Really Needed For Advanced Test?
Onto Innovation’s Christopher Haire explains why ensuring the physical properties that matter most are tightly understood and controlled, in The Specialty Device Surge Part 3: Solving The Process Control Challenges Of MEMS, Photonics, Co-Packaged Optics, And More.
Synopsys’ Guy Cortez and Maheshwaran Jothi dig into analytics-driven yield diagnostics and failure analysis integration for advanced-node devices, in Complete End-To-End Closed-Loop Product Yield Ramp And Learning.
Advantest’s Fabio Pizza details the evolution of ATE from a pure defect-detection system to one that provides system-level validation supported by AI software tools, in Test Distribution Evolves To Meet AI Challenges.
proteanTecs’ Noam Brousard shows how in-chip monitoring restores trust through predictive maintenance that can identify and correct errors in real time, in Ensuring AI Reliability: Mitigating Silent Data Corruption Risks.
Teradyne’s Aik-Moh Ng explains why next-gen AI architectures demand purpose-built power test systems, in The AI Server Challenge: Testing Power At Scale.
Nordson’s Chris Rand contends that the chip industry needs to focus on regional capability in light of rising supply chain risk and geopolitical uncertainty, in Home Win: Challenging The Traditional Semiconductor Manufacturing Model.
Siemens’ Mike Sharp shows how on-chip instrumentation and a host-side software framework shorten the path from first silicon to actionable debug data, in Debugging Modern SoCs With Embedded Analytics: Instrumentation, Trace, And Faster Root-Cause Isolation.
Sponsor White Papers
Features And Benefits Of The SECS/GEM Standard – eBook
How equipment manufacturers and factories can leverage standardized communication to accelerate automation and enhance productivity.
Advanced Metrology for Backside Metallization Using Picosecond Laser Ultrasonics
A compelling alternative, providing high-precision measurements across a wide thickness range with micron-scale spatial resolution.
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