Top Stories

Lots Of Little Knobs For Power
A growing list of small changes will be required to keep power, heat, and noise under control at 10/7nm and beyond.

The Next Phase Of Machine Learning
Chipmakers turn to inferencing as the next big opportunity for this technology.

Mixed Messages For Mixed-Signal
What does the future of analog mixed-signal design and verification look like? Can we expect to see any methodology changes?

Blogs

Editor In Chief Ed Sperling finds multiple companies focusing on qubits as the next wave in computing kicks into gear, but problems remain, in Quantum Madness.

Mentor’s Matthew Ballance digs into portable stimulus at the block, subsystem and system levels, in An Incremental Approach To Reusing Automated Tests From IPs to SoCs.

Helic’s Magdy Abadir explains the basic steps in EM crosstalk analysis and post-silicon debug, in Electromagnetic Crosstalk Analysis: Unlocking The Mystery.

Cadence’s Dave Pursley argues that you can’t afford to design silicon for a standard as early as 5G, but you also can’t afford not to, in The 5G Design Dilemma.

Synopsys’ Gordon Cooper points to some key factors to consider when choosing an embedded vision system, in Software Framework Requirements For Embedded Vision.

Rambus’ Frank Ferro observes that from signal integrity issues to EUV, there are tradeoffs involved with moving to the latest nodes, in The Promises And Challenges Of 7nm.

Moortec’s Oliver King and Ramsay Allen observe that increased gate density and process variability have made ensuring acceptable chip operating conditions more important, in The Importance Of Embedded In-Chip Monitoring In Advanced Node CMOS Technology.

ANSYS’ Annapoorna Krishnaswamy zeroes in on why power grid design has become a limiting factor for PPA, in Full-Chip Power Integrity And Reliability Signoff.