Special Report
Chiplets Vs. Soft IP: Different In Almost Every Way
A chiplet marketplace would require deep changes in the design-through-manufacturing flow.
Top Stories
Limited by Power
Access to power is changing the industry’s view about energy efficiency, which impacts all levels of the system stack and abstractions.
AI Buildout Makes HPC Simulation More Challenging
Complexity mounts, driven by multiple dies, larger and more complex systems, and the incessant demand for performance improvements everywhere.
Opinion
Quantum Technologies: Innovation and Investment
Lots of progress, and plenty of opportunity.
Sponsor Blogs
Fraunhofer EAS’ Benjamin Prautsch argues that choosing the right problems for AI to tackle will be crucial, in AI In A/MS IC Design: Between Buzzword And Productivity Boost.
Synopsys’ Monica Olvera and Gustavo Pimentel find that modern compute is pushing far more data than prior generations of I/O were designed for, in PCIe 8.0: Preparing For The Next Doubling.
Quadric’s Lee Vick digs into how an ancient data point proves a modern transformation, in AI Moves Out Of The Cloud And Onto The Edge.
Rambus’ Simon Bussières looks at how to ensure robust, scalable, and secure data transport across heterogeneous sensor arrays, in MIPI CSI-2 Provides The Backbone Of Automotive Sensor Networks.
Expedera’s Paul Karazuba explains how high utilization, low memory movement, and broad model compatibility can coexist, in Next Generation AI: Transitioning Inference From The Cloud To The Edge.
Cadence’s Reela Samuel breaks down how thermal constraints directly influence floor planning, macro placement, and power delivery network topology, in Thermal Management In 3D-IC: Modeling Hotspots, Materials, & Cooling Strategies.
Arm’s Odin Shen investigates how CPU-based embedding, unified memory, and local retrieval workflows come together to enable responsive, private RAG pipelines on desktop AI platforms, in Rethinking The Role Of CPUs In AI: A Practical RAG Implementation.
Ansys’ Scott Parent highlights how digital threads that connect every stage of a product’s lifecycle can enable seamless collaboration among technologies, departments, and stakeholders, in Harness Simulation To Connect To Industry 5.0.
Siemens’ Kurt Takara suggests enhancing the reliability of multi-clock and safety-critical designs to minimize the risk of costly late-stage bugs, Streamlining DO-254 Compliance: The Power Of Automated Clock-Domain Crossing Verification.
Sponsor White Papers
Arm Performance Cookbook: Your Guide to Optimal Design and Verification (EBook)
118 pages of comprehensive methodologies for achieving optimal system performance in Arm-based SoC implementations.
Next Generation AI: Transitioning Inference from the Cloud to the Edge
Technical challenges, architectural innovations, and benchmarks to help OEMs successfully transition to edge-native AI.
Designing for 448G: Modulation, DSP, and Channel Trade-offs in High-Speed SerDes
The electrical and implementation-level feasibility of 448G signaling in the context of AI and HPC cluster networks.
Guidance For Using SystemReady On Automotive Platforms
Key areas where platform firmware developers must go beyond the scope of SystemReady to meet automotive-specific needs.
Digital Engineering Drives Industry 5.0
How engineering simulation is accelerating product development, adding value and reducing costs.
Evaluating A PDN Based On Jitter
Using simulation to determine the effectiveness of a power delivery network decoupling.
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