Special Report
Glitch Power Issues Grow At Advanced Nodes
Problem is particularly acute in AI accelerators, and fixes require some complex tradeoffs.
Top Stories
Chip Industry Silos Are Crimping Advances
Development teams constantly wrestle with new technologies and tools, but often it’s the associated corporate structures that cause the greatest challenges.
Round Tables
Which Data Works Best For Voltage Droop Simulation
New challenges around when and how to apply it, and what changes in 3D-ICs raises.
SRAM’s Role In Emerging Memories
Tools and optimizations are needed for SRAM to play a role in AI hardware; other memories make inroads.
The Future Of Memory
From attempts to resolve thermal and power issues to the roles of CXL and UCIe, the future holds a number of opportunities for memory.
Rethinking Memory
Von Neumann architecture is here to stay, but AI requires novel architectures and 3D structures create a need for new testing tools.
Blogs
Quadric’s Steve Roddy finds that many already are predicting the end of the era that just began, in Is Transformer Fever Fading?
Keysight’s Jenn Mullen looks at overcoming test automation debt and improving productivity for QA engineers and software developers, in How Can You Use ChatGPT For Software Testing?
Rambus’ Tim Messegee digs into how a memory interface chipset can boost bandwidth, in Scaling Server Memory Performance To Meet The Demands Of AI.
Arm’s Brian Jeff offers techniques on using a hardware-assisted CPU profiling mechanism for source code hotspot detection, memory access analysis, and data sharing issues, in SoC Telemetry & Performance Analysis Using Statistical Profiling Extension.
Cadence’s Louis Tsai shows how to manage and mitigate heat-related issues to preserve longevity and reliability, in Multi-Chiplet Marvels: Exploring Chip-Centric Thermal Analysis.
Ansys’ Tobias Lauinger explains how to avoid unwanted scattered or specular light at the smartphone camera sensor, in Exploring The Facets Of Stray Light With Simulation.
Synopsys’ Andrew Appleby, Xiaorui Hu, and Bhavana Chaurasia lay out how specially architected logic cells and memory cache instances help meet design goals, in Getting Optimal PPA For HPC & AI Applications With Foundation IP.
Siemens EDA’s Janet Attar presents a way to create a high-quality floorplan in a fraction of the time, in AI-Driven Macro Placement Boosts PPA.
Sponsor White Papers
See The Future of IoT: Planning For Success With Smart Vision
What makes up vision solutions and how to build a heterogeneous compute system that addresses the demands of computer vision.
How To Characterize Low-Noise Amplifiers
Learn how the flexible hardware and advanced software capabilities of a network analyzer simplify a low-noise amplifier’s performance characterization.
A Solver Combination Strategy For Photonic Integrated Components
Some approaches for addressing these challenges with a combination of optical solvers.
Post-Quantum Cryptography (PQC): New Algorithms For A New Era
What you need to know about the new algorithms designed to protect against quantum computer attacks.
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