Top Stories
Architecting Chips For High-Performance Computing
Data center IC designs are evolving, based on workloads, but making the tradeoffs for those workloads is not always straightforward.
Memory On Logic: The Good And Bad
Do the benefits outweigh the costs of using memory on logic as a stepping-stone toward 3D-ICs?
Using AI/ML To Minimize IR Drop
Heterogeneous and advanced-node designs are creating unexpected post-layout challenges for design teams, but some issues can be addressed earlier in the flow.
Linear Drive Optics May Reduce Data Latency
As data demands increase, the photonics industry tries new solutions.
The Challenges Of Working With Photonics
From curvilinear designs to thermal vulnerabilities, what engineers need to know about the advantages and disadvantages of photonics.
Video
Challenges With Chiplets And Power Delivery
Benefits and challenges in heterogeneous integration.
Blogs
Fraunhofer IIS/EAS’ Roland Jancke looks at key techniques for demonstrating quality, safety, and security, from unique identification to open source, in Trusted Electronics: Current And Future Developments.
Siemens’ Hossam Sarhan and Dusan Petranovic contend that new physical verification approaches are needed to ensure the performance and reliability of superconducting ICs, in How To Get Accurate Inductance Extraction For Superconductor ICs.
Rambus’ Emma-Jane Crozier surveys the need for more memory bandwidth and capacity spanning from data center to endpoint, How AI 2.0 Will Shape The Memory Landscape.
Synopsys’ William Ruby shows how optimizing the performance per watt of HPC SoCs starts when defining the architecture, in Integrating Energy Efficiency Considerations Into Your Design From The Beginning.
Cadence’s Shyam Sharma explores how, from gaming consoles to network switches, higher data rates are enabling low-power memory to expand beyond its traditional spaces, in LPDDR5X Opening New Markets For Low-Power DRAMs.
Ansys’ Laura Carter explains how simulation helps manage the complexities of building and maintaining a fusion reactor test rig, in Running On Star Power.
Mixel’s Ashraf Takla weights how IoT demands a balance between cloud and edge processing to optimize system performance, in MIPI In Next Generation Of AI IoT Devices At The Edge.
Arm’s Bolt Liu presents a post-link optimizer for typical server workloads, in BOLT Optimization Technology Could Bring Obvious Performance Uplift On Arm Server.
Quadric’s Steve Roddy explains the origins of the Chimera architecture, in Hybrid Architecture Blends Best Of Both Worlds.
Sponsor White Papers
Unlocking PPA Benefits Of Backside Routing
An overview of backside power delivery and the advantages it provides for chip developers.
Performance Boost In Powerful Real-Time Cortex-R Processor Using Data Prefetch Control
The performance of the Cortex-R82 prefetcher and the intensity of prefetching required across different application areas using various industry standard benchmarks to measure the performance of the processor.
Hybrid Methodology To Extract Kinetic And Magnetic Inductances For Superconductor Technologies
How to achieve faster runtimes and better accuracy for supercomputer ICs.
Low-Power Relaxation Oscillator With Temperature-Compensated Thyristor Decision Elements
A circuit that uses CMOS thyristor-based decision elements for IoT and biomedical uses.
PCI Express Test Overview
More about PCI Express — the high-performance and high-bandwidth serial communication interconnect standard — and how to test it.
Quantum Well Design Basics
What materials to use for designing quantum wells.
Amplify Simulation Via Effective Data And Process Management
Handling and storing simulation data is important, requiring tools and process flow.
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