RISC-V’s Increasing Influence
Does the world need another CPU architecture when that no longer reflects the typical workload? Perhaps not, but it may need a bridge to get to where it needs to be.
Development Flows For Chiplets
A chiplet economy requires standards, organization, and tools — and that's a problem.
New Data Center Protocols Tackle AI
UALink scales up, while Ultra Ethernet scales out.
Chiplet Tradeoffs And Limitations
Multi-die assemblies offer more flexibility, but figuring out the right amount of customization can have a big impact on power, performance, and cost.
Implementing AI Activation Functions
Why flexibility, area, and performance are traded off in AI inferencing designs.
Die-to-die Interconnect Standards In Flux
Many features of UCIe 2.0 seen as “heavy” are optional, causing confusion.
The Best DRAMs For Artificial Intelligence
The choice of DRAM depends on where the action is.
Future-proofing AI Models
The rate of change in AI algorithms complicates the decision-making process about what to put in software, and how flexible the hardware needs to be.
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