Special Report
Sweeping Changes For Leading-Edge Chip Architectures
Large language models and huge data volumes are prompting innovation at every level.
Top Stories
Patterns And Issues In AI Chip Design
Devices are getting smarter, but they’re also consuming more energy and harder to architect; change is a constant challenge.
The Race Toward Quantum Advantage
Enormous amounts of money have been invested into quantum computing, but so far it has not surpassed conventional computers. When will that change?
Managing P/P Tradeoffs With Voltage Droop Gets Trickier
Higher current densities set against lower power envelopes makes meeting specs more challenging, especially at advanced nodes.
ReRAM Seeks To Replace NOR
There is increased interest in ReRAM for embedded computing, especially in automotive applications, as more of its known issues are solved. Nevertheless, there is no one-size-fits-all NVM.
Blogs
Fraunhofer IIS/EAS’ André Lange looks at how aging simulation and electromigration analysis can improve the long-term stability of designs in a virtual environment, in Reliability On The Rise In IC Design.
Synopsys’ Vamsi Thatha explains why virtual metal fill (VMF) provides more accurate extraction and timing results than the traditional metal sheet over area (MSOA) approach, in Using Virtual Metal Fill To Predict The Impact Of High Level Nets.
Siemens EDA’s Mike Donnelly discusses how new thermal models in the electronics supply chain are helping to cool down thermal design issues, in No Hot Products.
Keysight’s Amit Varde advises documenting the IP selection process and establishing procedures for effective IP management, in Unlocking Efficiency: The Power Of IP Blocks In Silicon Chip Design.
Rambus’ Joseph Rodriguez digs into the latest sensor updates and agreements, which will increase flexibility for handling data, in New Developments Set To Accelerate MIPI CSI-2 Adoption In Automotive.
Quadric’s Steve Roddy suggests downsizing your big, expensive applications-class CPU, in Your AI Chip Doesn’t Need An Expensive Insurance Policy.
Ansys’ Tim Palucka describes a faster way to predict the operational lifetime of solder joints in automotive applications, in Jumping Over Thermal Cycles Accelerates Thermomechanical Fatigue Simulations.
Cadence’s Steve Brown examines plans for automating the design workflow to reduce errors introduced by humans, in LLM Technology For Chip Design.
Arm’s Julio Suárez assesses performance-per-dollar of Nginx Reverse Proxy and API Gateway on different AWS instances, in Nginx Performance On AWS Graviton3.
Sponsor White Papers
Electro-Thermal Design Breakthrough
Enabled by new BCI ROM thermal modeling technology.
Achieving High-Performance, Low-Power Design Optimization With The Solido Library IP Solution
Verifying library IP to optimize power, performance and area tradeoffs.
The Ansys Charge Plus PiC Solve
A tool for modeling accumulation of charged plasma that can destroy underlying electronic components.
Arm Total Compute: Engineering For Tomorrow’s Workload
Using ARM’s IP design approach to design SoCs that keep up with work loads.
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