Top Stories
System Coverage Undefined
What does it mean to have verified a system and how can risk be measured? The industry is still scratching its head.
Verifying AI, Machine Learning
OneSpin’s CEO looks at what’s needed in this computing space, which technologies are winning, and what the key metrics will be.
Verification’s Breaking Points
Depending on design complexity, memory allocation or a host of other issues, a number of approaches simply can run out of steam.
Video
Tech Talk: TCAM
How to save power and reduce area with ternary content addressable memory.
Blogs
Editor in Chief Ed Sperling points to new and potentially huge opportunities for EDA, in Thinking Much Bigger.
Cadence’s Frank Schirrmeister examines what’s next for system integration, in System Design And Verification Challenges: Are They On- Or Off-Chip?
Mentor’s Progyna Khondkar shows how to use Liberty libraries to accumulate cell-level attributes and power down functions, in Get To Know The Gate-Level Power Aware Simulation.
Synopsys’ Tom De Schutter explains why putting together LEGOs is like building an SoC, in Prototyping Building Blocks.
Aldec’s Radek Nawrot digs into PLDs for low-power devices and how to optimize them, in Finite State Machine Synthesis In Programmable Circuits.
ARM’s Jason Andrews details how to use the same software images for virtual and FPGA prototyping, in Making Software Development Equivalent For Models And Boards.
eSilicon’s Mike Gianfagna looks at an intensive training program for finFET ASIC design, in Talking The Talk On Training.
OneSpin’s McKenzie Ross points a spotlight on formal and functional safety, in DVCon Europe Takes Over Munich Oct. 16-17.
