Top Stories

Firmware Skills Shortage
Adding intelligence into devices requires a different skill set, and finding enough qualified people is becoming a challenge — especially in less glamorous areas.

When Is Verification Done?
The actual time may be more of a fuzzy risk assessment than a clear demarcation.

Big Challenges In Verifying Cyber-Physical Systems
Experts at the Table: Models and standards are rare and insufficient, making it difficult to account for hardware-software and system-level interactions and physical effects.

Blogs

Technology Editor Brian Bailey contends that jumping straight into a discussion about implementing open-source verification tools misses one of the most important things the community could do, in The Single Greatest Opportunity For Open Source.

Synopsys’s Qiuyang Wu warns that large size, physical reuse, and signal propagation behavior pose timing signoff challenges for AI chips, in Timing Challenges In The Age Of AI Hardware.

Siemens EDA’s Joseph Sawicki shows how digital twins radically improve the speed and completeness of IC verification and validation cycles, in Advancing IC And Systems Design With The Digital Twin.

Cadence’s Frank Schirrmeister sketches out how digital twins are being used across the semiconductor industry, from models of SoCs to the fabs that make them, in Hyperscaling Cyber-Physical Systems.

OneSpin’s Rob van Blommestein explains how leading companies achieve IC integrity, in Verification Knowledge At Your Fingertips.

Codasip’s Roddy Urquhart demonstrates how using a processor description language improves the efficiency of modifying and optimizing instruction sets, in Customizing An Existing RISC-V Processor.