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Advancing IC And Systems Design With The Digital Twin

Digital twins present an opportunity for radically faster and more complete IC verification and validation cycles.

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As many of you may have seen, we’ve passed a major milestone since Siemens announced its intent to acquire Mentor Graphics four years ago. As of January 1, 2021, “Mentor, a Siemens business” has become “Siemens EDA” and remains a segment of the larger Siemens Digital Industries Software organization. Siemens is bringing together one of the world’s most comprehensive EDA portfolios with technologies for simulation, mechanical design, low-code, manufacturing, and IoT cloud optimization. The result is an industrial software powerhouse ideally positioned to help customers navigate the accelerating convergence of IC design and systems design.

Since Siemens helped pioneer the concept of the digital twin, it seems appropriate to commemorate this milestone with an overview of how digital twin technology is advancing the way IC design engineers verify and validate next-generation ICs.

For IC design engineers with any significant degree of experience, the notion that digital twin technology is fundamental to advancing state-of-the-art semiconductor design might seem a given. After all, EDA tools have successfully generated increasingly accurate digital representations of IC designs for more than 35 years.

But designing a modern IC is more challenging than ever, and creating a virtual representation of an IC design is just one of many steps in developing and producing a next-generation SoC. As manufacturing complexity and demand for ever more advanced technology grows, it has become much more difficult for companies to design, verify, and validate products.

Meanwhile, digital twin technology has grown exponentially more comprehensive and powerful thanks in large part to advances in algorithms engineered to run on processors designed for extreme performance. Consequently, today’s digital twins present the opportunity for radically faster and more complete IC verification and validation cycles, paving the way for dramatically higher quality end-products and faster time to market.

There’s a greater need than ever to not only verify that IC designs function properly to the IC specification, but also to verify and validate that they work in the context of the end-system – especially if the system needs to comply with a particular set of protocols or standards, or if safety and security are mandatory. Increasingly, to do this correctly requires verification and validation technology (e.g. simulation) that moves beyond the traditional realm of what’s been considered EDA and closer to the digital twin concept.

So what exactly is a digital twin? Put simply, it is leveraging digitalization to generate the best possible virtual representation of a physical world. It allows companies to thoroughly test a virtual model of their product before committing to manufacturing. The concept originated in the mechanical design world decades ago, with many early applications focused on manufacturing and mechanical engineering tasks.

Today, digital twins are one of the core conceptual models for product lifecycle management (PLM) technology. But the technology is applied to a range of markets in the mechanical design world, and extending that to IC and electronic systems design is a logical next step, since we in the IC design community have essentially been designing and testing this way for decades. In fact, digital twins are poised to take a giant leap forward by allowing companies to test their IC designs more easily and upfront in the context of the end-system.

Fueling the adoption of the digital twin for IC verification and validation is the parallel global trend toward systems companies developing their own ICs in-house to optimize product differentiation, and to meet increasingly stringent design, quality, and cost requirements. In fact, systems companies are now the fastest growing segment of the global foundry customer base, with a five-year CAGR of more than 35%.

Because systems companies focus as much on the end product as on any particular IC or subsystem, they are key drivers of the increasing convergence of semiconductor design and systems design – which is a trend of relevance for not just IC design teams at systems companies, but for all semiconductor design engineers.

Digital twins represent a “shift left” for IC design because they allow multiple disciplines to work seamlessly together, eliminating boundaries between electrical and mechanical design teams by providing a single source of truth. They also allow IC designers to verify and validate their devices against highly accurate digital simulations of the sub-systems, systems, end-products, and even the environments within which ICs will operate throughout their lifecycle.

Another way digital twins shave time off of verification and validation cycles is by providing an environment for modeling different parts of a design across different stages of the maturity cycle. This allows IC designers to test software much earlier in the design process.

Because digital twins can also collect data that can be fed back for continuous improvement downstream, digital twins complement the fast-emerging trend toward embedding monitoring technology into complex SoCs to enable “fab-to-field” analytics capabilities that accelerate silicon bring-up, optimize product performance, and confirm that devices are operating “as designed” for functional safety and cybersecurity purposes.

This is an exciting time to be in EDA. ICs designs are growing incredibly complex, but leveraging comprehensive digital twin technology can transform complexity into opportunity, helping engineers overcome the toughest challenges of electronic systems today and tomorrow.

Explore more examples of how Siemens EDA is thinking beyond the chip by visiting our new website at siemens.com/eda.



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