Top Stories
Government Funding For Chip Design Tools Spreads
Manufacturing has the lion’s share of global government handouts, but design R&D is gaining ground as the ecosystem draws closer.
SLM Gains Traction, But It’s Complicated
Issues persist about how and where to add it in, and how to manage data; AI will help.
Verification Fails To Keep Up
Design complexity may be growing faster than verification tools and methodologies are evolving. This is resulting in increased delays for chip success.
Best Options For Using AI In Chip Design
Narrowly defined verticals offer the best opportunities for AI. Plus, what will the impact be on junior engineers?
Opinion
Technology Editor Brian Bailey takes issue with the economics of current AI development, in AI Effort And Money Misplaced.
Sponsor Blogs
Synopsys’ Robert Kruger explores the myriad decisions multi-die chip designers face, from node selection to choice of interconnect, in Chiplet Design Considerations.
Alphawave Semi’s Tony Chan Carusone looks at FEC performance in a variety of application scenarios, in Programmable Hardware Delivers 10,000X Improvement In Verification Speed Over Software For Forward Error Correction.
Baya Systems’ Brian Carlson explains how profiling systems early can expose fundamental issues in data flow and resource coordination, in Unleashing Heterogeneous Compute: Lessons From Real-World System Design.
Cadence’s Guo Yu digs into using non-PCIe protocols for abstraction layers, in An Overview Of CXL Mode Alternate Protocol Negotiation.
Siemens’ Priyank Jain shows how AI-driven DRC debug can overcome the chip integration bottleneck, in How To Transform Verification Time-To-Results.
Keysight’s Yiao Li focuses on derivative-free techniques for solving problems where gradient-based methods fall short, in AI Meets Device Modeling: Transforming Compact Modeling With Machine Learning.
Arteris’ Andy Nightingale talks about a standards-based approach to developing modular architectures for AI, HPC, and automotive platforms, in A Smarter Path To Chiplets Through An Enhanced Multi-Die Solution.
Sponsor White Papers
A Signal Integrity Guide to HSD PCB Design
eBook: Common signal integrity challenges in HSD designs and how to avoid them.
6G System Design: Realistic Modeling, Simulation and Verification of Next-Generation Wireless Systems
Empowering the design, modeling, and verification of complex 6G systems.
A Quantum Leap in Architecture Design of Chiplet Cache Systems
A rapid architecture and design platform for chiplet-based cache-coherent systems.
Benchmark Before You Build
True software-stack readiness goes well beyond simply booting an operating system; you must run and benchmark the actual applications.
Making SoC Integration Simple – Achieve Higher Productivity and Quality
Simplify large-scale projects, reduce development costs, and accelerate time to market with SoC integration automation.
Launching The Full Potential Of 3D IC With Front-End Architectural Planning
eBook: Using predictive analytics and heterogeneous package workflows to design cost-effective multi-die assemblies.
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