Top Stories

Speeding Up The R&D Metrology Process
The goal is to use fab-like methods in the lab, but that’s not easy.

Spiking Neural Networks Place Data In Time
How efficiently can we mimic biological spiking process of neurons and synapses, and is CMOS a good choice for neural networks?

Atomic Layer Etch Expands To New Markets
Next-gen etch methodology is necessary and mature enough, but it’s still slow.

Blogs

Editor In Chief Ed Sperling predicts flexible IC technology will boom, but different substrates and new technologies still need the same kind of predictability and reliability as silicon, in Make Way For Flexible ICs.

Executive Editor Mark LaPedus sees China making progress on its semi manufacturing, so look out for compound semis, materials and wafers, in Time To Watch China’s Equipment Efforts.

Coventor’s Michael Hargrove warns that accurate modeling can avoid yield problems in DRAM and misalignment of 3D NAND, in Semiconductor Memory Evolution And Current Challenges.

Brewer Science’s James Lamb digs into the advantages of low-shrinkage spin-on carbon materials for high-temperature PECVD and post-processing, in Advanced Materials For High-Temperature Process Integration.

Cree/Wolfspeed’s Kasyap Patel shares some hardware solutions that mitigate the design challenges and meet requirements of the latest tropospheric scatter applications, in Beyond-Line-Of-Sight Troposcatter Communications Primer.

Sponsor White Papers

Speeding Up Process Optimization With Virtual Processing
Why a 3D understanding of complex process sequences is required to solve certain scaling challenges.

Copper Electrodeposition For Fan-Out Wafer-Level Packaging
How to deal with megapillar challenges in high density fan-out wafer-level packaging (FOWLP).

Generalized Class-E Power Amplifier With Shunt Capacitance And Shunt Filter
A unique design flexibility that can either extend the maximum operating frequency of a power amplifier or allow the use of larger active devices with higher power handling capability.