Special Report
How To Optimize A Processor
There are at least three architectural layers to processor design, each of which plays a significant role.
Top Stories
Will Big Competition Attract More Talent For IC Companies?
Tech and auto giants are putting even more pressure on the semiconductor labor market. Some say it could be just what the industry needs.
Repositioning For A Changing IC Market
Renesas’ EVP on M&A, disaggregation, customized solutions, and how and why the various technology pieces are shifting.
AI-Powered Verification
AI can be used in several ways to help existing verification processes, but the biggest gain may come from rethinking some fundamentals.
Who Benefits From Chiplets, And When
Challenges involving reliability, integration and chiplet availability will take time to iron out.
Embedded Software: Sometimes Easier, Often More Complex
Dependencies and partitioning can turn a simple piece of code into a complex system challenge.
Blogs
Technology Editor Brian Bailey contends that significant improvements in verification are possible, but getting critical mass behind them will be difficult, in Is AI Improving A Broken Process?
Cadence’s Frank Schirrmeister looks at how advances in computing and connectivity are transforming industries from consumer electronics to aerospace and defense, in Design For Context And Its Impact On EDA.
Movellus’ Aakash Jani warns that for AI compute, simply throwing more chips or processors at the problem is not a scalable solution, in Enabling Big Chip AI Solutions Through Intelligent Clock Networks.
Siemens’ Matt Walsh investigates bridging the chasms separating product engineering teams from component supply and electronics manufacturing, in The Evolving Digital Journey Of The Electronics Value Chain.
Synopsys’ Ajit Sequeira finds that parallelism is the only scalable solution for making any application faster, in Next-Generation Distributed Static Timing Analysis On The Cloud.
Codasip’s Rupert Baines explains why licensing models for IP using an open ISA can get confusing, in Differentiation And Architecture Licenses In RISC‑V.
Renesas’ Michael Joehren suggests a way to get TWS earbuds powered up quickly and in a small form factor, in True Wireless Stereo Earbud Charger Cradle.
Sponsor White Paper
High-Level Synthesis: It’s Still Hardware Design
Who needs to be involved for a high-level synthesis hardware design flow to be successful?
Zone-ECU Virtualization Solution Platform
A hypervisor can turn one physical ECU into multiple virtual ECUs for a zonal architecture for automotive.
Designing Application-Specific Processors For Wireless 5G SoCs
Heterogeneous ASIP cores are proving to be a feasible solution to meet the performance-intensive demands of 5G standards.
Evolving Your ADAS And AV Tests With Emulation Capability
Insights and key steps needed to sign off on new ADAS and AV functionality confidently.
EDA Software Design Flow Considerations For The RF/Microwave Module Designer
The steps for implementing an integrated design flow for an MCM monolithic microwave integrated circuit (MMIC) design.
