Top Stories

Debugging Debug
Can time spent in debug be reduced?

Using Data Mining Differently
As the amount of data continues to rise, so does the ability to do something useful with it.

Verification Of Functional Safety
Part 2 of 2: How should companies go about verifying functional safety and what tools can be used?

Video

Tech Talk: 5/3nm Parasitics
What to expect at future process nodes.

Blogs

Editor in Chief Ed Sperling argues that the whole tech industry needs to start thinking differently about what it creates, in Who Will Regulate Technology?

Mentor’s Matthew Hogan explains why successful verification requires more than just DRC and LVS rule decks, in A Reliability Baseline Is Essential For Today’s Complex IC Designs.

Synopsys’ Shekhar Kapoor digs into machine learning and how it can help meet PPA challenges and improve ECO optimization productivity, in Regain Your Power With Machine Learning.

NetSpeed’s Rajesh Ramanujam highlights the importance of cultivating the right company culture, in Functional Safety: A Way Of Life.

ArterisIP’s Kurt Shuler contends that more sophisticated automotive chips require a more advanced methodology to stitch together IP, in How SoC Interconnect Enables Flexible Architecture For ADAS And Autonomous Car Designs.

Aldec’s Vatsal Choksi looks at communication between sequence, sequencer and driver, in Inside UVM, Take Two.

eSilicon’s Mike Gianfagna examines what’s inside the package, what’s the goal, and how new technology is evolving, in Deconstructing Deep Learning.

OneSpin’s Tom Anderson shows why tool safety compliance matters, and how vendors can make the process easier, in Making Sense Of Safety Standards.

Cadence’s Frank Schirrmeister argues that a combination of verification engines is required to successfully develop a new class of chips, in AI And Machine Learning Drive New SoC Verification Choices.