What to expect at future process nodes.
Ralph Iverson, principal R&D engineer at Synopsys, talks about parasitic extraction at 5/3nm and what to expect with new materials and gate structures such as gate-all-around FETs and vertical nanowire FETs.
New architectures, different markets and more variables make it increasingly difficult to design and verify low-power chips.
How good are standard FPGAs for AI purposes, and how different will dedicated FPGA-based devices be from them?
Sixteen startups attracted funding rounds of nine figures in November.
Seventeen startups took in mega-rounds of $100 million or more during October, with a cumulative total of just over $3.2 billion.
More nodes and alternative memories are in the works, but schedules remain murky.
Why Intel, AMD, Arm, and IBM are focusing on architectures, microarchitectures, and functional changes.
Moving large amounts of data around a system is no longer the path to success. It is too slow and consumes too much power. It is time to flip the equation.
CEO Tony Hemmelgarn talks about autonomous cars, 5G, EDA integration and the Siemens acquisition of Mentor.
Can a software engineer create hardware? It may be possible, but not in the way that existing high-level synthesis tools do it.
How good are standard FPGAs for AI purposes, and how different will dedicated FPGA-based devices be from them?
Experts at the Table: What are the limitations today that are preventing 3D-ICs from becoming mainstream, and which companies pushing to make it happen?
Reporter’s Notebook: A personal quest to bridge the gap between art and the digital world.
Who makes money with an open-source ISA, the current state of the RISC-V ecosystem, and what differentiates one vendor from the next.
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