tag: dielectrics

Method To Determine The Permittivity of Dielectric Materials in 3D Integrated Structures At Broadband RF Frequencies
By Technical Paper Link - 25 Sep, 2024 - Comments: 0

A new technical paper titled "Characterizing the Broadband RF Permittivity of 3D-Integrated Layers in a Glass Wafer Stack from 100 MHz to 30 GHz" was published by researchers at NIST. Abstract "We present a method for accurately determining the permittivity of dielectric materials in 3D integrated structures at broadband RF frequencies. With applications of microwave and millimeter-wave ele... » read more

Research Bits: Aug. 20
By Jesse Allen - 20 Aug, 2024 - Comments: 0

EUV mirror interference lithography Researchers from the Paul Scherrer Institute developed an EUV lithography technique that can produce conductive tracks with a separation of just five nanometers by exposing the sample indirectly rather than directly. Called EUV mirror interference lithography (MIL), the technique uses two mutually coherent beams that are reflected onto the wafer by two id... » read more

New Interconnect Metals Need New Dielectrics
By Katherine Derbyshire - 23 Jul, 2024 - Comments: 0

Just as circuit metallization must evolve to manage resistance as features shrink, so must the dielectric half of the interconnect stack. For quite some time, manufacturers have needed a dielectric constant (k) less than 4, which is the value for SiO2, but they have struggled to find materials that combine a low dielectric constant with mechanical and chemical stability. In work presented at... » read more

Powering CFETs From The Backside
By Katherine Derbyshire - 21 Mar, 2024 - Comments: 0

The first CMOS circuits to incorporate backside power connections are likely to be based on stacked nanosheet transistors, but further down the road, planners envision complementary transistors (CFETs) that vertically integrate stacked NFET and PFET devices. With at least twice the thickness of a nanosheet transistor, connecting CFETs to each other and to the rest of the circuit is likely to... » read more

Design Considerations For Ultra-High Current Power Delivery Networks
By Quaid Joher Furniturewala - 11 Jul, 2023 - Comments: 0

This article is adapted from a presentation at TestConX, March 5-8, 2023, Mesa, AZ. A power-delivery network (PDN), also called a power-distribution network, is a localized network that delivers power from voltage-regulator modules (VRMs) throughout a load board to the package’s chip pads or wafer’s die pads. The PDN includes the VRM itself, all bulk and localized capacitance, board vi... » read more

2D Semiconductor Materials Creep Toward Manufacturing
By Katherine Derbyshire - 16 Feb, 2023 - Comments: 0

As transistors scale down, they need thinner channels to achieve adequate channel control. In silicon, though, surface roughness scattering degrades mobility, limiting the ultimate channel thickness to about 3nm. Two-dimensional transition metal dichalcogenides (TMDs), such as MoS2 and WSe2, are attractive in part because they avoid this limitation. With no out-of-plane dangling bonds and at... » read more

Review of essential use of fluorochemicals in lithographic patterning and semiconductor processing
By Technical Paper Link - 06 Apr, 2022 - Comments: 0

New academic paper by researchers from Cornell University.   Abstract "We identify and describe categories of fluorochemicals used to produce advanced semiconductors within the lithographic patterning manufacturing processes. Topics discussed include the per- and polyfluoroalkyl substance (PFAS) materials used and their necessary attributes for successful semiconductor manufacturing... » read more

Next-Gen Transistors
By Ed Sperling - 07 Mar, 2022 - Comments: 0

Nanosheets, or more generally, gate-all-around FETs, mark the next big shift in transistor structures at the most advanced nodes. David Fried, vice president of computational products at Lam Research, talks with Semiconductor Engineering about the advantages of using these new transistor types, along with myriad challenges at future nodes, particularly in the area of metrology. » read more

More Data, More Memory-Scaling Problems
By Bryon Moyer - 14 Jan, 2021 - Comments: 0

Memories of all types are facing pressures as demands grow for greater capacity, lower cost, faster speeds, and lower power to handle the onslaught of new data being generated daily. Whether it's well-established memory types or novel approaches, continued work is required to keep scaling moving forward as our need for memory grows at an accelerating pace. “Data is the new economy of this ... » read more

Variation Threat In Advanced Nodes, Packages Grows
By Ed Sperling - 21 Dec, 2020 - Comments: 0

Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

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