Gates Add Functionality, But Wires Create Problems


Key takeaways: While transistors see continuous improvement, wires keep getting worse because of the smaller geometries and larger chip sizes. There are limited ways to avoid such problems, but the biggest impact will come from floorplanning. Analysis today is not adequate. New developments, such as backside power and 3D integration, provide temporary relief but new materials are a d... » read more

Resistance In Advanced Packages Is Now A System-Level Problem


Key Takeaways Kelvin measurement, which has been in use for decades, is no longer sufficient for addressing resistance in complex chips. The problem is that resistance is no longer concentrated in transistors, and where it does show up isn't always consistent or obvious. Traditional pass/fail approaches need to be replaced by more granular and flexible analytics and methodologies. ... » read more

Double Intra-Cavity VCSELs: Properties And Design Challenges At Cryogenic Temperatures (Tampere Univ.)


A new technical paper titled "Thermal characteristics of a double intra-cavity contact VCSEL for cryogenic optical links" was published by researchers at Tampere University. Excerpt "Cryogenic computing systems, including quantum computers, cryo-CMOS and superconducting processors, necessitate efficient optical data links capable of operation at temperatures as low as 4 K. Vertical-cavity s... » read more

Molybdenum: Transforming Semiconductor Manufacturing For Next-Generation Technologies


One trillion semiconductors produced in a single year. A digital foundation powering AI's explosive growth. The next frontier requires chips that are smaller, faster, and exponentially more powerful. A new white paper from Counterpoint Research  reveals how advanced metallization—specifically molybdenum—is becoming a critical enabler for semiconductor manufacturing in this new era. Th... » read more

Ready For Curvilinear: New Innovations For Resistance Extraction


The rapid evolution of semiconductor industry, fueled by the propagation of IOT applications, image sensors, photonics and MEMS applications and other emerging technologies dramatically increased the complexity of IC design. Designers often use unconventional structures to achieve the desired functionality and optimal performance. For example, image sensors use wide polygons in the layout and a... » read more

Electromigration And IR Drop At Advanced Nodes


Manufacturing chips at 3nm and below is a challenge, but it's only part of the problem. Designing chips that can be manufactured and will actually work is potentially an even bigger problem. There is more data to sift through for place-and-route, less margin to pad a design, and there are more physical effects to contend with as transistors get taller, density increases, and chips age. Jeff Wil... » read more

Glitch Power Issues Grow At Advanced Nodes


An estimated 20% to 40% of total power is being wasted due to glitch in some of the most advanced and complex chip designs, and at this point there is no single best approach for how and when to address it, and mixed information about how effective those solutions can be. Glitch power is not a new phenomenon. DSP architects and design engineers are well-versed in the power wasted by long, sl... » read more

Scatterometry-Based Methodologies For Characterization Of MRAM Technology


Magnetoresistive random-access memory (MRAM) technology and recent developments in fabrication processes have shown it to be compatible with Si-based complementary metal oxide semiconductor (CMOS) technologies. The perpendicular spin transfer torque MRAM (STT-MRAM) configuration opened up opportunities for an ultra-dense MRAM evolution and was most widely adapted for its scalability. Insertion ... » read more

The Shortest Path Deception


When manufacturing, assembling, and using integrated circuit (IC) chips, the electrostatic discharge (ESD) caused by accumulated static can damage the IC circuitry if the circuit is not properly protected [1]. To prevent such damage, ESD protection devices are designed into the circuitry such that they will create a low impedance path that limits the peak voltage and current by diverting excess... » read more

Impact Of GAA Transistors At 3/2nm


The chip industry is poised for another change in transistor structure as gate-all-around (GAA) FETs replace finFETs at 3nm and below, creating a new set of challenges for design teams that will need to be fully understood and addressed. GAA FETs are considered an evolutionary step from finFETs, but the impact on design flows and tools is still expected to be significant. GAA FETs will offer... » read more

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