GDDR6: Signal Integrity Challenges For Automotive Systems


Signal integrity (SI) is at the forefront of SoC and system designers’ thinking as they plan for upcoming high-speed GDDR6 DRAM and PHY implementations for automotive and advanced driver assistance system (ADAS) applications. Rambus and its partners are closely looking at how GDDR6’s 16 gigabit per second speed at each pin affects signal integrity given the cost and system constraints for a... » read more

Why Chips Die


Semiconductor devices contain hundreds of millions of transistors operating at extreme temperatures and in hostile environments, so it should come as no surprise that many of these devices fail to operate as expected or have a finite lifetime. Some devices never make it out of the lab and many others die in the fab. It is hoped that most devices released into products will survive until they be... » read more

High-Speed SerDes At 7nm


eSilicon’s David Axelrad discusses the challenges with 56Gbps and 112Gps SerDes, and why the switch from analog to digital is required for performance and low power. https://youtu.be/E-CU8TLvjjc » read more

IP Electromagnetic Crosstalk Requires Contextual Signoff


By Magdy Abadir and Anand Raman Continuous advancement in technology scaling is enabling the emergence of high-performance application markets such as artificial intelligence, autonomous cars and 5G communication. These electronic systems operate at multi-GHz speed, while consuming the lowest amount of power possible leaving very little margin for error. Chips in these systems are highly in... » read more

Why Inductance Is Good for Area, Power and Performance


By Magdy Abadir and Yehea Ismail For chips designed at advanced technology nodes, interconnect is the dominant contributor towards delay, power consumption, and reliability. Major interconnects such as clock trees, power distribution networks and wide buses play a significant role in chip failure mechanisms such as jitter, noise coupling, power distribution droops, and electro-migration. ... » read more

Tech Talk: 5/3nm Parasitics


Ralph Iverson, principal R&D engineer at Synopsys, talks about parasitic extraction at 5/3nm and what to expect with new materials and gate structures such as gate-all-around FETs and vertical nanowire FETs. https://youtu.be/24C6byQBkuI » read more

Symptoms Of SoC Electromagnetic (EM) Crosstalk


By Anand Raman and Magdy Abadir Have you ever had your silicon demonstrate unexpected behavior? Have you ever found unexplainable design failure or performance degradation? A number of issues could be the culprit - from overloaded signal nets, a noisy power grid, or increasing temperature - but one problem often overlooked is electromagnetic (EM) crosstalk. Electromagnetic (EM) crosstal... » read more

3D Neuromorphic Architectures


Matrix multiplication is a critical operation in conventional neural networks. Each node of the network receives an input signal, multiplies it by some predetermined weight, and passes the result to the next layer of nodes. While the nature of the signal, the method used to determine the weights, and the desired result will all depend on the specific application, the computational task is simpl... » read more

Crosstalk Analysis At 7nm


The increasing demand for electronic systems with increasing bandwidth and decreasing size puts more high-speed circuitry and high bandwidth channels in ever-closer proximity. The continuous increase in internal clock frequencies (e.g. 5 - 10 GHz) and the increase in data rates (e.g. >10Gbps) are fueling the emergence of electromagnetic (EM) crosstalk issues. Parasitic inductance and indu... » read more

Noise Issues At 10nm And Below


Most of the conversations below 10nm have been about lithography, materials and design constraints. But as companies push to 7nm and beyond, they are faced with a host of new challenges, including how to deal with electromagnetic crosstalk. Electromagnetic crosstalk is unwanted interference caused by the electric and magnetic fields of one or more signals (aggressors) affecting another sign... » read more

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