Engineering The Signal For GDDR6


DDR1 through DDR3 had their challenges, but speeds were below one gigabit and signal integrity (SI) challenges were more centered around static timing and running pseudo random binary sequence (PRBS) simulations. Now, with GDDR6, we are working on 16 to 20 gigabits per second (Gbps) signaling and even faster in the near future. As a result, engineering the signal for GDDR6 will require careful ... » read more

Manufacturing Bits: March 19


Exascale computers Intel and the U.S. Department of Energy (DOE) have set plans to develop and deliver the first exascale supercomputer in the United States. The system, called Aurora, will provide an exaFLOP of performance or a quintillion floating point computations per second. Targeted for delivery in 2021, the system is being developed at DOE’s Argonne National Laboratory. The system ... » read more

Power Budgets At 3nm And Beyond


There is high confidence that digital logic will continue to shrink at least to 3nm, and possibly down to 1.5nm. Each of those will require significant changes in how design teams approach power. This is somewhat evolutionary for most chipmakers. Five years ago there were fewer than a handful of power experts in most large organizations. Today, everyone deals with power in one way or another... » read more

New Design Approaches At 7/5nm


The race to build chips with a multitude of different processing elements and memories is making it more difficult to design, verify and test these devices, particularly when AI and leading-edge manufacturing processes are involved. There are two fundamental problems. First, there are much tighter tolerances for all of the components in those designs due to proximity effects. Second, as a re... » read more

Variation’s Long Tentacles


Today, most design engineers don't pay much attention to variation. It's generally considered to be a manufacturing problem. Even within the fab, various job functions are segmented enough that variation in one part of the process, such as the photomask shop, doesn't necessarily come to the attention of the people doing deposition and etch or those polishing the wafers. But increasingly, ... » read more

Quantum Issues And Progress


Quantum computing is showing significant promise, and research is beginning to move from the earliest stages to a deeper understanding of what works best commercially and why. On paper, quantum computing algorithms are potentially revolutionary. They suggest a way to solve some problems more quickly and more accurately than conventional computers ever could. But out in the real world of prac... » read more

How Much Data Can Be Pushed Through Copper Wires?


As the amount of digital data grows, so do requirements on the speed of the transmission at all levels of the transmission chain—between dies in a shared package, between packaged chips inside a device, and between devices. The communication channels encountered at every stage of this communication are different in nature. Those between dies in a shared package, or between packaged chips in a... » read more

High-Speed SerDes At 7nm


eSilicon’s David Axelrad discusses the challenges with 56Gbps and 112Gps SerDes, and why the switch from analog to digital is required for performance and low power. https://youtu.be/E-CU8TLvjjc » read more

The Growing Materials Challenge


By Katherine Derbyshire & Ed Sperling Materials have emerged as a growing challenge across the semiconductor supply chain, as chips continue to scale, or as they are utilized in new devices such as sensors for AI or machine learning systems. Engineered materials are no longer optional at advanced nodes. They are now a requirement, and the amount of new material content in chips contin... » read more

Analog Migration Equals Redesign


Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

← Older posts