Electromagnetic Crosstalk Considerations In Low Power Designs


By Magdy Abadir, Padelis Papadopoulos, and Yehea Ismail
 Power consumption continues to be a critical design metric in high-performance mobile electronics. In order to meet the aggressive power budget targets, chips today need to operate at extremely low power levels, which increases the critical signals’ susceptibility to electromagnetic (EM) crosstalk effects. Because a low-power So... » read more

The Power Of De-Integration


The idea that more functionality can be added into a single chip, or even into a single system, is falling out of vogue. For an increasing number of applications, it's no longer considered the best option for boosting performance or lowering power, and it costs too much. Hooman Moshar, vice president of engineering at Broadcom, said in a keynote speech at Mentor's User2User conference this w... » read more

Designing 5G Chips


5G is the wireless technology of the future, and it’s coming fast. The technology boasts very high-speed data transfer rates, much lower latency than 4G LTE, and the ability to handle significantly higher densities of devices per cell site. In short, it is the best technology for the massive amount of data that will be generated by sensors in cars, IoT devices, and a growing list of next-g... » read more

IP Electromagnetic Crosstalk Requires Contextual Signoff


By Magdy Abadir and Anand Raman Continuous advancement in technology scaling is enabling the emergence of high-performance application markets such as artificial intelligence, autonomous cars and 5G communication. These electronic systems operate at multi-GHz speed, while consuming the lowest amount of power possible leaving very little margin for error. Chips in these systems are highly in... » read more

Tech Talk: 5/3nm Parasitics


Ralph Iverson, principal R&D engineer at Synopsys, talks about parasitic extraction at 5/3nm and what to expect with new materials and gate structures such as gate-all-around FETs and vertical nanowire FETs. https://youtu.be/24C6byQBkuI » read more

How To Build A Better MEMS Microphone


We are seeing a lot of interest in simulating noise, particularly for condenser microphones. With any transducer, noise reduction is always a plus, and with microphones there are two specific applications that need low noise. One is where the microphone is positioned away from the sound source, such as in video calling or when using voice commands with tablet computers. The other is where multi... » read more

Predictions: Manufacturing, Devices And Companies


Some predictions are just wishful thinking, but most of these are a lot more thoughtful. They project what needs to happen for various markets or products to become successful. Those far reaching predictions may not fully happen within 2018, but we give everyone the chance to note the progress made towards their predictions at the end of the year. (See Reflection On 2017: Design And EDA and Man... » read more

Performance Improvement By System Aware Substrate Noise Analysis For Mixed-signal IC


The market wants mixed ICs that are smaller and cheaper, and even provide advanced features. To satisfy this contradiction, many mixed ICs makers are reducing their bill of materials (BOM) cost by decreasing the amount of materials in the package or on a board. But these cost-effective methods can cause significant performance degradation with intensified coupling effects due to substrate noise... » read more

Noise At 7nm And Beyond


The digital and analog worlds always have been very different. Digital engineers see the world in terms of electrons and a well-defined set of numerical values. Their waves are discrete and squared off and their devices are often noisy when they turn on and off. Analog engineers think in terms of quiet, smooth waves, and they are very concerned about anything that can disrupt those waves, such ... » read more

The Implementation Of Embedded PVT Monitoring Subsystems In Today’s Cutting Edge Technologies


This new whitepaper from Moortec takes a comprehensive look at the Implementation of Embedded PVT Monitoring Subsystems in Today’s Cutting Edge Technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm)... » read more

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